Marta M. Hernando

High-efficiency and wide-bandwidth performance obtainable from a two-input buck converter

A study of the two-input post-regulators is carried out in this paper. In these post-regulators, only a part of the total power undergoes a switching conversion process, whereas the remainder of the power comes up to the load directly, with no power conversion process. Due to this fact, very high efficiency is achieved. Moreover, the stress in the semiconductors and the filter size are both much lower than in standard post-regulators. Two-input post-regulators require two-output main converters. However, many converter topologies can be easily adapted to supply two-output voltages with no efficiency penalty. Two-input postregulators can be used in many power converters. Multiple-output DC-to-DC converters and AC-to-DC power factor correctors are two good examples.

Design-Oriented Analysis and Performance Evaluation of a Low-Cost High-Brightness LED Driver Based on Flyback Power Factor Corrector

This paper presents a new control strategy for power factor correctors (PFCs) used to drive high-brightness light-emitting diodes (HB-LEDs). This control strategy is extremely simple and is based on the use of standard peak-current-mode integrated controllers (PCMICs), reducing its cost and complexity in comparison to traditional PFC controllers. In fact, this method is an alternative implementation of the one-cycle control to PFCs belonging to the flyback family of converters, without introducing high complexity for reducing the total harmonic distortion. In this case, the use of a simple exponential compensation ramp instead of a linear one is the proposed solution for drawing a sinusoidal input current. Moreover, the line current is cycle-by-cycle controlled, and therefore, the input-current feedback loop is extremely fast, which allows the use of this type of control with high-frequency lines. The proposed idea is to apply this simple control to a one-stage PFC in order to design a low-cost ac-dc HB-LED driver. However, the application of this control strategy to PFC belonging to the flyback family of converters is not obvious. Design-oriented considerations about its implementation in PCMIC will be provided. Finally, an experimental prototype of this driver was developed.

Helpful hints to select a power-factor-correction solution for low- and medium-power single-phase power supplies

This work presents a review of power-factor-correction (PFC) circuits for low- and medium-power single-phase power supplies. The main idea is not just to show the state of the art of this topic but to select the most interesting topologies for each application depending on the power level, the input voltage range, and the output voltage. Since IEC 61000-3-2 regulations came into force, many new topologies have been presented trying to obtain a cost-effective solution to reduce the input current harmonic content. Each one of them has its application range due to the inherent characteristics of the topology. Obviously, not every converter is useful for the same application. This is especially perceptible in PFC circuits due to the large amount of different solutions. Hence, this paper tries to show the most appropriate topologies for each application, being the input power and the IEC 61000-3-2 Class some of the main parameters to select it. The scope of the paper is focused on single-phase power supplies belonging to IEC 61000-3-2 Class A and Class D with an input power level below 4 kW.

Dynamic limits of a power-factor preregulator

Power-factor correction has been one of the hottest topics during the last few years and, hence, many new circuits have appeared. In general, it is assumed that preregulators based on multiplier circuits have poor dynamics and, then, a second stage is needed to improve the output voltage dynamic behavior. The other option is the use of single-stage topologies which have fast output voltage regulation although the input current waveform is not sinusoidal. This work presents an analysis of the dynamic behavior of a conventional power-factor preregulator. The objective is to find the limits of the dynamic characteristics of these circuits when the priority is to improve the output voltage regulation and not the total harmonic distortion or the power factor. A large-signal model is presented and the theoretical results are validated with a prototype.

Tapped-Inductor Buck HB-LED AC–DC Driver Operating in Boundary Conduction Mode for Replacing Incandescent Bulb Lamps

High-brightness light-emitting diodes (HB-LEDs) are recognized as being potential successors of incandescent bulb lamps due to their high luminous efficiency and long lifespan. To achieve these advantages, HB-LED ballast must be durable and efficient. Furthermore, for this specific application, ac-dc HB-LED ballast requires a high-step-down ratio, high power factor and low cost. This paper presents a tapped-inductor buck power factor corrector (PFC) operating in boundary conduction mode design for replacing incandescent bulb lamps. This low-cost solution presents a suitable high-step-down ratio without galvanic isolation in order to produce an output voltage of about 20 V from line voltage. In addition, the tapped-inductor buck PFC maintains high efficiency in comparison to other one stage solutions widely used to design low-cost ac-dc HB-LED drivers (e.g., flyback PFCs). Static analysis, input current distortion analysis, and an average small signal model of the tapped-inductor buck PFC have been implemented in this paper both to check the validity of the proposed solution and to provide a suitable design procedure of the ac-dc HB-LED driver. Finally, a 12-W experimental prototype was developed to validate the theoretical results presented.

Multiple output AC/DC converter with an internal DC UPS

The usual way to avoid a computer shutdown during a mains failure is to connect an ac uninterruptible power system (UPS). However, there are other possibilities, such as using a dc UPS to obtain the dc output voltages directly from the battery instead of generating an ac voltage to feed the whole power supply. Thus, the topology must operate either from the ac mains or from a battery. A complete design of an ac/dc power supply with an internal dc UPS is presented in this paper. The solution is based on the coupling of the UPS to the main transformer. Moreover, the power supply meets all the requirements needed to be used as an Advanced Technology eXtended (ATX) PC power supply-multiple outputs, power and voltage ratings, size, protections, etc. A prototype has been fully developed and tested as a PC power supply. The autonomy achieved at full power is around 7 minutes.

New active input current shapers to allow AC-to-DC converters with asymmetrically driven transformers to comply with the IEC-1000-3-2

Four new topologies of active input current shapers (AICSs) for converters with symmetrically driven transformers (such as half-bridge, full-bridge and push-pull) have been proposed. This paper analyzes the extension of the use of these new AICSs topologies to converters with asymmetrically driven transformers. Using some of these topologies, the size of AICS inductors can be reduced and even integrated in a single magnetic core. As in the case of other converters with AICS circuit, the new topologies allow line current harmonics to be reduced and thereby to comply with the IEC 1000-3-2 specifications, whilst maintaining all the features of standard DC-to-DC converters (e.g., fast transient response). Finally, the proposed topologies have been experimentally tested.

Switching Performance Comparison of the SiC JFET and SiC JFET/Si MOSFET Cascode Configuration

Silicon Carbide (SiC) devices are becoming increasingly available in the market due to the mature stage of development fact of their manufacturing process. Their numerous advantages compared to silicon (Si) devices, such as, for example, higher blocking capability, lower conduction voltage drop, and faster transitions make them more suitable for high-power and high-frequency converters. The aim of this paper is to study the switching behavior of the two most-widely studied configurations of SiC devices in the literature: the normally-on SiC JFET and the cascode using a normally-on SiC JFET and a low-voltage Si MOSFET. A detailed comparison of the turn-on and turn-off losses of both configurations is provided and the results are verified against the experimental efficiency results obtained in a boost converter operating in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Furthermore, special attention will be paid to the switching behavior of the cascode configuration, analyzing the effect of its low-voltage Si MOSFET and comparing different devices. The study carried out will confirm that the overall switching losses of the JFET are lower, making it more suitable for operating in the CCM in terms of the overall converter efficiency. However, the lower turn-off losses of the cascode show this device to be more suitable for the DCM when ZVS is achieved at the turn-on of the main switch. Finally, all the theoretical results have been verified in an experimental 600-W boost converter.

Dynamic limits of a power factor preregulator

Power factor correction has been one of the hottest topics during the last years and hence, many new circuits have appeared. In general, it is assumed that preregulators based on multiplier circuits have poor dynamics and then, a second stage is needed to improve the output voltage dynamic behaviour. The other option is the use of single stage topologies which have fast output voltage regulation although the input current waveform is not sinusoidal. This paper presents an analysis of the dynamic behaviour of a conventional power factor preregulator. The objective is to find the limits of the dynamic characteristics of these circuits when the priority is to improve the output voltage regulation and not the total harmonic distortion or the power factor. A large signal model is presented and the theoretical results are validated with a prototype.

Average current mode control of series-switching post-regulators used in power factor correctors

The application of the average current mode control (ACMC) to a new type of very efficient post-regulator is studied in this paper. This post-regulator, called series-switching post-regulator (SSR), has been proposed to improve the dynamic response series-switching of power factor correctors (PFC), The post-regulator exhibits very high efficiency due to the fact that only a part of the total power undergoes a power conversion process. Using ACMC, the bandwidth of the post-regulator increases in relation to the one obtained when a conventional voltage-mode control (with or without feedforward) is used. As a result, the attenuation of the input voltage ripple (100-120 Hz) increases and, a lower bulk capacitor can be used to obtain a low voltage ripple at the output, which is extremely important when a battery is connected at the output. This is rather common in distributed power supply systems.