Martha A. Botzakaki

Probing the properties of atomic layer deposited ZrO2 films on p-Germanium substrates

Zirconium oxide (ZrO2) thin films of 5 and 25 nm thickness were deposited by atomic layer deposition at 250 °C on p-type Ge substrates. The stoichiometry, thickness, and valence band electronic structure of the ZrO2 films were investigated by x-ray and ultraviolet photoelectron spectroscopies. For the electrical characterization, metal-oxide-semiconductor (MOS) capacitive structures (Pt/ZrO2/p-Ge) have been fabricated. Capacitance–voltage and conductance–voltage (C–V, G–V) measurements performed by ac impedance spectroscopy in the temperature range from 153 to 313 K reveal a typical MOS behaviour with moderate frequency dispersion at the accumulation region attributed to leakage currents. For the determination of the leakage currents conduction mechanisms, current density–voltage (J–V) measurements were carried out in the whole temperature range.

High capacitance density MIS capacitor using Si nanowires by MACE and ALD alumina dielectric

High capacitance density three-dimensional (3D) metal-insulator-semiconductor (MIS) capacitors using Si nanowires (SiNWs) by metal-assisted chemical etching and atomic-layer-deposited alumina dielectric film were fabricated and electrically characterized. A chemical treatment was used to remove structural defects from the nanowire surface, in order to reduce the density of interface traps at the Al2O3/SiNW interface. SiNWs with two different lengths, namely, 1.3 μm and 2.4 μm, were studied. A four-fold capacitance density increase compared to a planar reference capacitor was achieved with the 1.3 μm SiNWs. In the case of the 2.4 μm SiNWs this increase was ×7, reaching a value of 4.1 μF/cm2. Capacitance-voltage (C-V) measurements revealed that, following a two-cycle chemical treatment, frequency dispersion at accumulation regime and flat-band voltage shift disappeared in the case of the 1.3 μm SiNWs, which is indicative of effective removal of structural defects at the SiNW surface. In the case of the 2.4 ...

The impact of ultrathin Al2O3 films on the electrical response of p-Ge/Al2O3/HfO2/Au MOS structures

It is well known that the most critical issue in Ge CMOS technology is the successful growth of high-k gate dielectrics on Ge substrates. The high interface quality of Ge/high-k dielectric is connected with advanced electrical responses of Ge based MOS devices. Following this trend, atomic layer deposition deposited ultrathin Al2O3 and HfO2 films were grown on p-Ge. Al2O3 acts as a passivation layer between p-Ge and high-k HfO2 films. An extensive set of p-Ge/Al2O3/HfO2 structures were fabricated with Al2O3 thickness ranging from 0.5 nm to 1.5 nm and HfO2 thickness varying from 2.0 nm to 3.0 nm. All structures were characterized by x-ray photoelectron spectroscopy (XPS) and AFM. XPS analysis revealed the stoichiometric growth of both films in the absence of Ge sub-oxides between p-Ge and Al2O3 films. AFM analysis revealed the growth of smooth and cohesive films, which exhibited minimal roughness (~0.2 nm) comparable to that of clean bare p-Ge surfaces. The electrical response of all structures was analyzed by C–V, G–V, C–f, G–f and J–V characteristics, from 80 K to 300 K. It is found that the incorporation of ultrathin Al2O3 passivation layers between p-Ge and HfO2 films leads to superior electrical responses of the structures. All structures exhibit well defined C–V curves with parasitic effects, gradually diminishing and becoming absent below 170 K. D it values were calculated at each temperature, using both Hill–Coleman and Conductance methods. Structures of p-Ge/0.5 nm Al2O3/2.0 nm HfO2/Au, with an equivalent oxide thickness (EOT) equal to 1.3 nm, exhibit D it values as low as ~7.4 × 1010 eV−1 cm−2. To our knowledge, these values are among the lowest reported. J–V measurements reveal leakage currents in the order of 10–1 A cm−2, which are comparable to previously published results for structures with the same EOT. A complete mapping of the energy distribution of D its into the energy bandgap of p-Ge, from the valence band towards midgap, is also reported. These promising results contribute to the challenge of switching to high-k dielectrics as gate materials for future high-performance metal–oxide–semiconductor field-effect transistors based on Ge substrates. Making the switch to such devices would allow us toexploit its superior properties.

Influence of the atomic layer deposition temperature on the structural and electrical properties of Al/Al2O3/p-Ge MOS structures

The influence of deposition temperature on the structural, chemical, and electrical properties of atomic layer deposition (ALD)-Al2O3 thin films is investigated. ALD-Al2O3 films were deposited on p-type Ge substrates at 80, 150, 200, 250, and 300 °C. The atomic force microscopy analysis reveals smooth and cohesive films with extremely low roughness (0.2–0.6) nm at 150, 200, 250, and 300 °C. On the contrary, Al2O3 films deposited at the lowest available deposition temperature (80 °C) exhibit holes and aggregates implying a nonhomogeneous deposition. The x-ray photoelectron spectroscopy (XPS) analysis indicates the presence of stoichiometric Al2O3 films at all deposition temperatures. The calculated thickness from the analysis of XPS spectra seems to be in good agreement with the ALD nominal thickness for the films deposited at all deposition temperatures except the one of 80 °C. Transmission electron microscopy (TEM) analysis reveals a flat interface between Al2O3 and p-Ge in an atomic level. In addition, ...

Insights into the passivation effect of atomic layer deposited hafnium oxide for efficiency and stability enhancement in organic solar cells

Atomic layer deposited hafnium oxide is inserted between the zinc oxide electron transport material and the photoactive blend to serve as an ultra-thin passivation interlayer in organic solar cells with an inverted architecture. The deposition of hafnium oxide significantly improves the surface properties of zinc oxide via effective surface passivation and beneficial modification of surface energy; the latter leads to improved nanomorphology of the photoactive blend. As a result, lower recombination losses and improved electron transport/collection at the cathode interface are achieved. A simultaneous increase in open-circuit voltage, short-circuit current density and fill factor is obtained leading to a power conversion efficiency of 6.30% in the ALD-modified cell using a poly(3-hexylthiophene):indene-C60-bisadduct blend as the photoactive layer; this represents a 25% improvement compared to 5.04% of the reference device. Moreover, the incorporation of the passivation interlayer yields a significant stability enhancement in the fabricated solar cells which retain more than 80% of their initial efficiency (T80 lifetime) after 750 hours while the reference cell exhibits a T80 equal to 250 hours.

Study of Si Nanowires Produced by Metal-Assisted Chemical Etching as a Light-Trapping Material in n-type c-Si Solar Cells

Si nanowires (SiNWs) produced by metal-assisted chemical etching on n-type Si were investigated for their use as a light-trapping material in c-Si solar cells. The nanowires were fabricated before junction formation (on a lightly doped Si substrate) so that their core was bulk and nonporous. The above fabrication process was implemented in solar cell fabrication. The SiNW reflectivity was tested at different steps of solar cell processing and found to be lower than that of conventional random pyramids used in c-Si solar cells. Contact formation on the front side of the cell was investigated by considering metal deposition either directly on the nanowires or on bulk areas in between the nanowire areas. The superiority of this second case was demonstrated. Three different Si nanowire lengths were investigated, namely, 0.5, 1, and 1.5 μm, the case of 1 μm giving better results in terms of solar cell characteristics and external quantum efficiency. The electronic quality of the Si nanowire surface was investigated using the corresponding metal-oxide-semiconductor capacitors with atomic-layer-deposited alumina dielectric. Successful reduction of surface recombination centers at the large Si nanowire surface was achieved by reducing structural defects at their surface through a specific chemical treatment. Finally, using the determined optimized conditions for Si nanowire formation, chemical cleaning, and process implementation in solar cell fabrication, we demonstrated ∼45% increase in solar cell efficiency with 1 μm SiNWs compared to that from a flat reference cell processed under similar conditions. The above study was made on test solar cells without surface passivation.