Martin Freeman

Information agents for automated browsing

The proliferation of information providers has led to an increased number of users browsing the World Wide Web. ‘lime-consuming interaction and increased network loads are some of the adverse effects of browsing activities. This paper presents a design based on agent technology and the use of structured information, that significantly lowers network load and hits user-interaction by automating the task of browsing.

Emulating peripheral chips using a RISC core

As a first step in reducing the design time of peripheral chips and, ultimately, reducing controller boards to a single chip, a new reduced-instruction-set-computer (RISC) technology is proposed. In this technology, hardware task switching support that allows peripheral functions to be realized in firmware on a RISC core processor is provided. Whereas standard microprocessors require many clock cycles for a task switch, this approach reduces the task switching latency to one clock cycle. Such task switching can be controlled both internally from and externally to the core processor. Special instructions can also be used to effect the task scheduling process. Core processors with data and control path sizes of 8 b, 16 b and 32 b can be generated. The architecture permits several instruction formats. A prototype 25-50-MIPS are processor containing instances of many of the possible core components has been fabricated.<<ETX>>