Masaharu Kobayashi

Fermi level depinning in metal/Ge Schottky junction for metal source/drain Ge metal-oxide-semiconductor field-effect-transistor application

Schottky barrier height modulation in metal/Ge Schottky junction was demonstrated by inserting an ultrathin interfacial silicon nitride layer. The SiN interfacial layer suppressed strong Fermi level pinning in metal/Ge Schottky junction, which resulted in effective control of Schottky barrier height. Metal/SiN/Ge Schottky diode was systematically investigated in terms of SiN thickness dependence and metal work function dependence. At an optimal SiN thickness, Ohmic contact between metal and Ge was obtained as a result of Fermi level depinning, and almost ideal Schottky barrier height determined by the work function difference between the metal and Ge was achieved. This technology was finally applied to metal source/drain Ge metal-oxide-semiconductor field-effect-transistors with low source/drain resistance.

Radical oxidation of germanium for interface gate dielectric GeO2 formation in metal-insulator-semiconductor gate stack

GeO2 was grown by a slot-plane-antenna (SPA) high density radical oxidation, and the oxidation kinetics of radical oxidation GeO2 was examined. By the SPA radical oxidation, no substrate orientation dependence of growth rate attributed to highly reactive oxygen radicals with low oxidation activation energy was demonstrated, which is highly beneficial to three-dimensional structure devices, such as multigate field-effect transistors, to form conformal gate dielectrics. The electrical properties of an aluminum oxide (Al2O3) metal-oxide-semiconductor gate stack with a GeO2 interfacial layer were investigated, showing very low interface state density (Dit), 1.4×1011u2002cm−2u2009eV−1. By synchrotron radiation photoemission spectroscopy, the conduction and the valence band offsets of GeO2 with respect to Ge were estimated to be 1.2±0.3 and 3.6±0.1u2002eV, which are sufficiently high to suppress gate leakage.

Synchrotron radiation photoemission spectroscopic study of band offsets and interface self-cleaning by atomic layer deposited HfO2 on In0.53Ga0.47As and In0.52Al0.48As

The Synchrotron Radiation Photoemission Spectroscopic (SRPES) study was conducted to (a) investigate the surface chemistry of In{sub 0.53}Ga{sub 0.47}As and In{sub 0.52}Al{sub 0.48}As post chemical and thermal treatments, (b) construct band diagram and (c) investigate the interface property of HfO{sub 2}/In{sub 0.53}Ga{sub 0.47}As and HfO{sub 2}/In{sub 0.52}Al{sub 0.48}As. Dilute HCl and HF etch remove native oxides on In{sub 0.53}Ga{sub 0.47}As and In{sub 0.52}Al{sub 0.47}As, whereas in-situ vacuum annealing removes surface arsenic pile-up. After the atomic layer deposition of HfO{sub 2}, native oxides were considerably reduced compared to that in as-received epi-layers, strongly suggesting the self-clean mechanism. Valence and conduction band offsets are measured to be 3.37 {+-} 0.1eV, 1.80 {+-} 0.3eV for In{sub 0.53}Ga{sub 0.47}As and 3.00 {+-} 0.1eV, 1.47 {+-} 0.3eV for In{sub 0.52}Al{sub 0.47}As, respectively.

p-Channel Ge MOSFET by Selectively Heteroepitaxially Grown Ge on Si

We successfully demonstrate Ge pMOSFET integrated on Si. In this process, Ge is grown selectively on Si on patterned SiO2 by heteroepitaxy, and pMOSFET is fabricated with gate dielectric stack consisting of thin GeO2 and Al2O3 and Al metal gate electrode. Fabricated devices show ~80% enhancement over the Si universal hole mobility. These results are promising toward monolithically integrating Ge MOSFETs with Si CMOS VLSI platform.

High-Performance Gate-All-Around GeOI p-MOSFETs Fabricated by Rapid Melt Growth Using Plasma Nitridation and ALD

Rapid melt growth was used to fabricate gate-all-around germanium-on-insulator (GeOI) p-MOSFETs with plasma-nitrided Ge surface, Al2O3 high-k gate dielectric, and self-aligned NiGe contacts. The subthreshold swing is 71 mV/dec, which is better than those of the bulk and nanowire Ge p-MOSFETs reported to date. Planar GeOI p-MOSFET arrays show 40% hole mobility enhancement at a high effective field, which is as good as bulk Ge devices.

\hbox{Al}_{2}\hbox{O}_{3}

We have studied the surface cleaning of Sb-based compound semiconductors using HF, NH4OH, and HCl cleans and the metal–oxide–semiconductor (MOS) capacitors fabricated subsequently. GaSb, InGaSb, and AlGaSb surfaces are investigated using low-energy radiation from the synchrotron. Capacitance–voltage (C–V) and photoluminescence measurements are carried out on capacitors made with Al2O3 from atomic layer deposition and corroborated with the results from synchrotron spectroscopy. Excellent C–V characteristics with a mid-band-gap interface state density of 3u2009×u20091011/cm2eV are obtained on samples with the HCl clean. This is consistent with the finding that only the HCl acid clean is able to remove the native oxides present on GaSb and InGaSb surfaces, and produce clean and stable surfaces suitable for MOSFET development. Complete removal of AlOx on the AlGaSb surface was not possible using chemical cleaning. Termination of AlGaSb with two monolayers of GaSb is proposed as a solution.

Gate Dielectric and Self-Aligned NiGe Contacts

We successfully demonstrated Schottky barrier height modulation in metal/Ge Schottky junction by inserting an ultrathin interfacial SiN layer. The SiN layer suppressed strong Fermi level pinning in metal/Ge junction, which resulted in effective control of the Schottky barrier height. We systematically investigated its physics, for the first time, and almost zero Schottky barrier height was successfully obtained for electrons. We applied this technology to metal source/drain Ge NMOSFET and achieved low source/drain resistance.

Device quality Sb-based compound semiconductor surface: A comparative study of chemical cleaning

The surface cleaning of InGaAs and InAlAs is studied using Synchrotron Radiation Photoelectron Spectroscopy. Thermal annealing at 400 C can not completely remove the native oxides from those surfaces. Elemental arsenic build-up is observed on both surfaces after acid treatment using HCl, HF or H{sub 2}SO{sub 4} solutions, which is similar to acid-cleaned GaAs surface. Cleaned InGaAs surface is oxide free but small amount of aluminum oxide remains on cleaned InAlAs surface. The common chemical reactions between III-As semiconductors and acid solutions are identified and are found to be dominated by arsenic chemistry.

Fermi-level depinning in metal/Ge Schottky junction and its application to metal source/drain Ge NMOSFET

Ge channel is one of the promising performance boosters for replacing Si channel in future complementary metal-oxide-semiconductor technology. The uniaxial stress technology can further enhance the performance of Ge MOSFETs. In this paper, the uniaxial stress effect on Ge NMOSFETs was experimentally and theoretically investigated. The gate dielectric in the Ge NMOSFETs was fabricated by using the novel radical oxidation technique. The high quality of the gate dielectric allowed high vertical field mobility measurements. By applying mechanical uniaxial stress on the fabricated Ge NMOSFETs, the mobility enhancement was experimentally obtained. The physical mechanism of mobility enhancement under such strain indicates that the device performance of Ge NMOSFETs in the ballistic transport regime can achieve as much as 48% drive current gain beyond the 15 nm technology node.

Arsenic-dominated chemistry in the acid cleaning of InGaAs and InAlAs surfaces

A unique feature of the extremely long-range-extended blockade regime with its shape of a long stick, where the Coulomb blockade oscillation and negative differential conductance peak-positions can be systematically and precisely modulated for both extremely-wide VG and VD ranges, was clearly observed in a room-temperature-operating silicon single hole transistor. These results originate from the large quantum level spacing, large tunnel-barrier height, small tunnel-barrier curvature, small bias-induced barrier modulation, and large voltage gain, attributing to the formation of an ultrasmall dot in the gently sloped tunnel barriers along the [100] Si nanowire channel having the large subband modulation.