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Dive into the research topics where Masamichi Ishihara is active.

Publication


Featured researches published by Masamichi Ishihara.


electronic components and technology conference | 2008

A dual face package using a post with wire component: Novel structure for PoP, wafer level CSP and compact image sensor packages

Masamichi Ishihara; Yasuyuki Takehara; Takumi Yano; Yoshihiko Ino; Takashi Kurogi; Kenji Hashimoto; Hirotada Kawano

Information is presented regarding a newly developed bottom package of a package on package (PoP) structure referred to as a dual face package (DFP). Two types of DFP have been developed; one is DFP-PO (POst type), and the other is DFP-PW (Post with Wire component type). 116 PoPs were experimentally produced using DFP-PO. The assembly yield was 100% and there were no failures in a 500 thermocycle PoP test. There was no failure of the DFP-PW under thermocycle testing of a single package over 150 cycles. The DFP-PW was assembled using a post with wire component (PWC), newly developed by Kyushu Institute of Technology and a cooperative enterprise. Using this PWC, compact and thin DFP were achieved, in comparison with the current bottom package of PoP. The PWC contributes a compact and simple JISSO package for the semiconductor field besides PoP such as embedded IC substrates, image sensor packages and wafer level chip size packages (WLCSP).


Archive | 2008

Method of manufacturing semiconductor device with electrode for external connection and semiconductor device obtained by means of said method

Masamichi Ishihara; Hirotaka Ueda


Archive | 2007

Method for manufacturing semiconductor device having dual-face electrode structure and semiconductor device manufactured by the method

Masamichi Ishihara; Hirotaka Ueda


Applied Surface Science | 2009

Novel materials for electronic device fabrication using ink-jet printing technology

Yasushi Kumashiro; Hideo Nakako; Maki Inada; Kazunori Yamamoto; Akira Izumi; Masamichi Ishihara


Archive | 2013

Led illumination module and led illumination apparatus

Masamichi Ishihara; Kenshu Oyama; Shoji Murakami; Hitonobu Onosaka; Masato Shima


Archive | 2005

Method for processing copper surface, method for forming copper pattern wiring and semiconductor device manufactured using such method

Akira Izumi; Masamichi Ishihara


Archive | 2005

Packaged Stacked Semiconductor Device And Method For Manufacturing The Same

Masamichi Ishihara; Akira Izumi


Archive | 2009

SEMICONDUCTOR CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

Masamichi Ishihara; Hirotaka Ueda


Archive | 2009

Three-dimensionally integrated semiconductor device and method for manufacturing the same

Masamichi Ishihara; 政道 石原


Archive | 2009

Electronic component used for wiring and method for manufacturing the same

Masamichi Ishihara; Hirotaka Ueda

Collaboration


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Hirotaka Ueda

Kyushu Institute of Technology

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Akira Izumi

Kyushu Institute of Technology

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Yasuyuki Takehara

Kyushu Institute of Technology

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Takumi Yano

Kyushu Institute of Technology

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