Masaru Kikuchi

A 1/1.8-inch 6.4MPixel 60 frames/s CMOS Image Sensor with Seamless Mode Change

A1/1.8-inch 6.4Mpixel 60frames/s CMOS image sensor fabricated in a 0.18mum 1P3M process is described. A zigzag-shaped 1.75T/pixel architecture and a 10b counter-type column parallel ADC enables 2.5times2.5mum2 pixels. The resulting pixel has 38% fill factor, 12ke-/lux-s, and random noise of 7e-rms. A 10b parallel LVDS interface enables data rates of up to 4.32Gb/s with 216MHz DDR. Full frame and 2times2 binning modes are interchangeable without an extra invalid frame

A 1/1.8-inch 6.4 MPixel 60 frames/s CMOS Image Sensor With Seamless Mode Change

A 1/1.8-inch 6.4 MPixel 60 frames/s CMOS image sensor fabricated in a 0.18-mum single-poly triple-metal (1P3M) process is described. A zigzag-shaped 1.75 T/pixel architecture and a 10-bit counter-type column parallel ADC enables 2.5times2.5 mum2 pixels. The resulting pixel has 38% fill factor and 12ke-/lux.s sensibility. In addition, full frame and 2times2 binning modes are interchangeable without an extra invalid frame

A 1/2.3-inch 10.3Mpixel 50frame/s Back-Illuminated CMOS image sensor

This paper presents a 1/2.3-inch 10.3Mpixel Back-Illuminated (BI) CMOS image sensor that targets both digital still camera (DSC) and high-definition camcorder applications. These applications require high-pixel-count, high-sensitivity, high saturation signal, low noise and high-speed imaging for image quality [1]. The sensor is scaled down to get a higher resolution due to higher pixel count. Several approaches such as a Cu process to reduce the pixel height and inner micro-lenses to gather rays of incident light have been proposed to overcome electro-optical challenges [2–4]. The BI process has been reported as one of the most promising technologies to improve optical performance [5,9]. This BI image sensor includes a 10b/12b analog-to-digital converter (ADC), an internal phase-locked loop (PLL) and a 10b serial LVDS interface to enable a data-rate up to 576MHz.