Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Masaya Tamamura is active.

Publication


Featured researches published by Masaya Tamamura.


international solid-state circuits conference | 1992

A 9.5-Gb/s Si-bipolar ECL array

Masaya Tamamura; S. Shiotsu; M. Hojo; K. Nomura; S. Emori; H. Ichikawa; T. Akai

The authors describe a 9.5-Gb/s Si bipolar ECL (emitter coupled logic) gate which has performance approximately equal to that of custom ICs because of optimized ECL circuit design, 0.3- mu m Si bipolar process, and 10-GHz package technology. 9.5-GHz operation is obtained with 1-mA switching current and 0.3*5.5 mu m/sup 2/ emitter area because emitter current density (J/sub e/) for shortest propagation time is 1.5 to 2.0 times as large as J/sub e/ for maximum f/sub T/. This ECL array was designed for multi-gigabit system operation and, in addition to digital, logic, and analog functions, it is easily configurable to provide high-speed functions such as clock distributors, shift registers, and ripple counters. >


Archive | 1998

Digital PLL circuit

Syouji Ohishi; Masaya Tamamura; Koichi Hatta


Archive | 1989

Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit

Masaya Tamamura; Shinji Emori; Yoshio Watanabe; Isao Shimotsuhama


Archive | 1996

Semiconductor integrated circuit including plurality of phase-locked loops

Masaya Tamamura; Syouji Ohishi


Archive | 1989

Master-slave flip-flop circuit

Masaya Tamamura; Shinji Emori; Yoshio Watanabe; Isao Shimotsuhama


Archive | 1997

PLL circuit and its automatic adjusting circuit

Shinichi Shiotsu; Masaya Tamamura


Archive | 1991

IC package with electric conductor lines in dielectric package body

Masaya Tamamura; Yoshiro Morino


Archive | 1994

Signal processing device having PLL circuits

Masaya Tamamura; Shinichi Shiotsu


Archive | 1990

SIGNAL GENERATOR FOR GENERATING A DELAYED CLOCK SIGNAL

Masaya Tamamura; Shinji Emori


Archive | 1996

Semiconductor integrated circuit operable as a phase-locked loop

Masaya Tamamura; Syouji Ohishi

Collaboration


Dive into the Masaya Tamamura's collaboration.

Researchain Logo
Decentralizing Knowledge