Masayoshi Ino

Silicon nitride thin-film deposition by LPCVD with in situ HF vapor cleaning and its application to stacked DRAM capacitor fabrication

Silicon nitride film deposited by LPCVD with newly developed in situ HF vapor cleaning has been studied and applied to fabricate dielectric films for stacked DRAM capacitors. Using this method, an oxide-free surface of underlaid poly-Si can be obtained. Silicon nitride film deposited on this surface has been verified by FTIR measurement to have the stoichiometrically proper composition of Si/sub 3/N/sub 4/. However, the film was found to be selectively deposited on poly-Si electrodes. This selective deposition degrades the reliability of the stacked capacitor, because the silicon nitride can not completely cover the periphery of poly-Si electrodes on SiO/sub 2/. We propose a simple process that avoids the problem making it possible to apply silicon nitride film to stacked-capacitor fabrication. Stacked capacitors fabricated by this process exhibit very low leakage current and high electrical reliability even for ultra-thin silicon nitride films less than 5 nm thick. >

Electrical and Crystallographic Properties of Sputtered-Pb(Zr, Ti)O3 Films Treated by Rapid Thermal Annealing

Pyrochlore-phase lead-zirconate-titanate (PZT) films were prepared by rf-magnetron sputtering using a multi-element metal target at 400°C. These films were crystallized to the perovskite phase by rapid thermal annealing (RTA) at 600°C for a few minutes. The RTA-treated PZT films had not only extremely smooth surfaces but also tenfold stronger X-ray diffraction peak intensities of the perovskite structure than those of furnace-annealed films which had with rough undulation. The electrical properties of RTA-treated films indicated good ferroelectric properties. The remanent polarization and coercive field of the 100 nm-thick RTA-treated film were 15 µC/cm2 and 67 kV/cm, respectively. Fatigue measurements with alternating ±3 V pulses showed that the film was stable up to 109 cycles.

Effects of deposition temperature on the oxidation resistance and electrical characteristics of silicon nitride

A study was made of the effects of deposition temperature on the oxidation resistance and electrical characteristics of silicon nitride. It was found that silicon nitride below a certain limit thickness has no oxidation resistance. This threshold falls as the deposition temperature is lowered. 3-nm-thick silicon nitride deposited at 600/spl deg/C has sufficient oxidation resistance For wet oxidation at 850/spl deg/C, while 5 nm film deposited at 750/spl deg/C has no oxidation resistance. The electrical characteristics also improve as the deposition temperature is lowered. 6-nm-thick silicon nitride deposited at 600/spl deg/C shows a TDDB lifetime that is about two orders longer than that of 6-nm-thick silicon nitride deposited at 700/spl deg/C. It was also found that the silicon nitride transition layer which is deposited at the initial stage of deposition influences the oxidation resistance and electrical characteristics of thin silicon nitride. It was concluded that lowering the deposition temperature reduces the influence of the transition layer and improves the oxidation resistance and electrical characteristics of thin silicon nitride. >

Applicability of TiN Adhesion Layer Formed by Nitridation of Sputtered Ti Film to Blanket CVD-W Contact Filling

TiN film formed by rapid thermal nitridation (RTN) of sputtered titanium (Ti) was used as the adhesion layer for chemical vapor deposition (CVD) blanket tungsten (BLK-W) in a very high-aspect-ratio contact filling process. In contact holes, both TiN and TiSi2 layers, which formed simultaneously during RTN become thin in proportion to the decrease of the Ti film thickness because of the increase of the contact aspect ratio. Therefore, contact resistance increase and barrier effect degradation of the TiN adhesion layer during subsequent BLK-W film deposition are of concern when employing RTN of sputtered Ti film as the formation process technique in VLSIs. This study focused on the applicability of a TiN adhesion layer formed by RTN of sputtered Ti film to BLK-W contact filling technology in very high-aspect-ratio contacts.

Effects of Ion Implantation Doping on the Formation of Titanium Silicide on the Diffusion Layers

Si samples, with and without masking oxide films, implanted with various doses of As, P, or BF 2 have been evaluated on the formation of titanium suicides from titanium films. In all cases, suicide reaction for implantation with masking oxide films is more difficult than that for implantation without masking oxide films. Suicide reaction becomes more difficult with decreasing implant energy in the range over a critical dose. In the case of implantation with masking oxide films, knocked oxygen has been found at the surface of Si substrate. Suicide formation after removing the surface layers containing considerable amount of knocked oxygen with argon back-sputtering is as easy as suicide formation for implantation without masking oxide. The difficulty of Ti silicidation for implantation with masking oxide films is believed to be due to the effects of interference from knocked oxygen.

A New Failure Mechanism And Its Improvement On Gate Oxide Reliability At Field Edge By Locos Isoiation

Summary form only given. A new failure mechanism of gate oxide at the field oxide edge by LOCOS isolation has been found. The gate oxide reliability is degraded by the buildup of positive charges in addition to the thinning. Both effects can be reduced by a high-temperature annealing after gate oxidation and wet gate oxidation. >

Limitation of sputtered adhesion layer thickness for blanket CVD W in very high aspect contact filling

TiN formed by rapid thermal nitridation (RTN) of sputtered titanium (Ti) as an adhesion layer was used for blanket CVD tungsten (BLK-W) in very high aspect contact filling. In order to investigate the thickness limitation of the Ti film, contact resistance and junction leakage current were measured.<<ETX>>

The Effect of Amorphous Silicon Layer in Pe-Cvd Titanium Polycide Gate Dielectrics

Titanium silicide (TiSi x ), used as polycide gate consists of TiSi 1.1 and amorphous silicon (a-Si), was deposited by Plasma Enhanced Chemical Vapor Deposition method (PE-CVD). The effect of a-Si layer in PE-CVD Ti polycide gate dielectrics has been studied. In order to evaluate the a-Si layer effect, three types of samples were prepared on gate SiO 2 film with following structures : a) a-Si / TiSi- 1.1 / a-Si / phosphorus (P) doped poly-Si, b) a-Si / TiSi- 1.1 / non-doped poly-Si / P doped poly-Si and c) a-Si / TiSi 1.1 / P doped poly-Si, respectively. Furthermore, in order to avoid the influence of native oxide existence at the interface, the pre-cleaning treatment was performed in-situ on the poly-Si film surface before TiSi 1.1 film deposition. The gate dielectric strengths of these samples indicate that the gate dielectric degradation in PE-CVD Ti polycide gate is greatly dependent on Si under layer crystallization. It is effective using a-Si film as the under layer in decreasing the gate dielectric degradation . This is due to the Ti oxide interlayer, formed at the interface of TiSi 2.0 and poly-Si films, which restrains the TiSi x local penetration.