Mason B. Cabot

Platform level support for high throughput edge applications: the Twin Cities prototype

Even in the face of increasing network bandwidth, there is a desire among service providers to improve network security, availability, and performance. These improvements require increasingly complex computations on network packets. Current networking platforms cannot keep up, leading to less than desired throughput or functionality. Network processors deliver high networking throughput, but not the complex processing capabilities required. High-performance general-purpose processors deliver the complex processing needed, but not the network throughput. Combination platforms that include high-performance general-purpose CPUs and network processors hold the promise of greatly increasing platform performance, enabling desired edge application improvements. This article presents Twin Cities, a heterogeneous multiprocessor research platform we have constructed from a standard IXP1240 platform, a high-volume Intel/spl reg/ Pentium/spl reg/ III processor platform, and custom hardware. This platform provides a high-performance path (high throughput, low latency) between the two processors and presents a shared memory model to the programmer. We motivate and describe the Twin Cities platform, discuss the applications it targets, and present performance measurements.

Chapter 2 – Benchmarking Network Processors

It is noted that network processors (NPs) are an emerging field of programmable processors that are optimized to implement data plane and packet processing networking functions. NPs essentially support a form of a distributed, parallel programming model. They are also optimized for fast packet processing and I/O. The standard benchmarks for network processors do not yet exist thus making measuring, communicating, and comparing NPs performance difficult. Therefore, a definition of a standard set of benchmarks applicable to network processors is required. The goals of such a set of benchmarks include: covering different NP architectures, applicability to different NP application domains, and catering to audiences with different expectations. This chapter proposes a four-layered approach for NP benchmark definition to meet these goals. The chapter describes the utility of the hierarchical approach by specifying and measuring one or more benchmark examples at each level. The measurements are performed on the Intel IXP1200 network processor.