Massimo Redaelli

Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs

This paper proposes a new model for the partitioning and scheduling of a specification on partially dynamically reconfigurable hardware. Although this problem can be solved optimally only by tackling its subproblems jointly, the exceeding complexity of such a task leads to a decomposition into two phases. The partitioning phase is based on a new graph-theoretic approach, which aims to obtain near optimality even if performed independently from the subsequent phase. For the scheduling phase, a new integer linear programming formulation and a heuristic approach are developed. Both take into account configuration prefetching and module reuse. The experimental results show that the proposed method compares favorably with existing solutions.

Improved Small-Signal Analysis for Circuits Working in Periodic Steady State

This paper considers the formulation of the variational model (VM) of autonomous circuits (oscillators) working in periodic steady-state conditions. The shooting method, which is largely used to compute the solution in the time domain when the VM is forced by a small-signal perturbation, is studied. The proposed analytical approach can be exploited to improve accuracy in the simulation of the effects of noise sources. In particular, we justify from an analytical standpoint the adoption of a suitable periodicity constraint in the shooting method. We exploit the properties of block circulant matrices that naturally arise in the description of the problem. We prove that the frequency of the small-signal perturbation must be different from that of the unperturbed oscillator to avoid inaccuracy of the shooting method due to the existence of singularities in the VM formulation, and derive a method that allows us to get closer to the singularity.

Caronte: a complete methodology for the implementation of partially dynamically self-reconfiguring systems on FPGA platforms

It is common nowadays to employ FPGAS, not only as a means of rapidly prototyping and testing dedicated solutions, but also as a platform on which to implement actual production systems. Although modern FPGAS allow the designer to modify dynamically even only portions of the chip, to this date there is a lack of satisfying design methodologies that using only non-proprietary widely available tools make it possible to optimally implement a high-level specification into a partially dynamically reconfigurable system. The aim of this work is to propose a methodology for solving this problem. The main features of the Caronte methodology are: 1. full exploitation of partial dynamic reconfiguration; 2. the reconfiguration is internal; 3. a real-time Unix-like operating system helps the management of complex systems with multiple tasks, and simplifies reconfiguration through an optimized device driver.

Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse

This paper is focused on the scheduling of tasks on partially dynamically reconfigurable FPGA s in order to minimize the overall latency of the application. We propose a novel approach to the partitioning of a system specification by detecting recurrent structures in the specification itself. This technique has the objective of identifying modules that can be used more than once during the system lifetime. In such a scenario the reconfiguration overhead is minimized via both the device resource reuse, due to the partitioner, and the reconfiguration time hiding, due to the scheduler. A model of reconfigurable hardware, both for the device and the application, will also be defined and presented.

QR factorisation in the shooting method

Radio frequency (RF) applications in consumer electronics require solid methods for the computation of the steady state behaviour in autonomous and non autonomous circuits. The shooting method (SH) is possibly the most important steady state time domain numerical method currently employed in circuit simulation. We show that SH requires great care in the choice and use of matrix factorization methods. In particular, the advantages of QR over the more standard and widely employed LU method are shown.