Masud Akhtar

Preparation of Ultra-High Purity Higher Silanes and Germanes

Abstract Disilane and trisilane were synthesized by silent electric discharge (SED) in high purity silane. Within two hours 60–70% monosilane was converted into a mixture of higher silanes. Pure disilane and trisilane were obtained by variable temperature distillation of mixed higher silanes. In contrast to other sources of disilane, no impurities greater than 0.1 ppm could be detected in the SED produced disilane by gas chromatographick analysis. High purity digermane was prepared in 42% yield by SED in pure germane. Routine gas chromatographic methods have been developed to identify trace impurities in the semiconductor process gases (such as silanes, phosphines, etc.) down to the part per million level.

Advances in large area CIGS technology

This paper describes results in several areas that, taken as a whole, significantly contribute to the advancement of CIGS PV technology based on vacuum deposition. These results include the large area sputtering of Mo suitable for very high efficiency cells, the improved delivery of Cu by linear source evaporation for large area vacuum deposition of CIGS, a promising non-Cd buffer layer capable of vacuum deposition, and improvement of the properties of doped ZnO.

Implications of modified simplified hybrid process on CIGS devices and minimodules

The simplified hybrid (SH) process is the platform on which EPV Solar will develop a cost effective CIGS module manufacturing process. We have already implemented the SH process in our large area deposition system. In this report optimization of the Na access to the absorber layer was done by controlling the Cr underlayer thickness. In addition, CIGS process parameters have been modified to get a more uniform layer attaining good efficiency throughout the substrate at lower temperature. This helped us to make minimodule using our existing equipment design. Post-CIGS treatments of samples to passivate the surface before CdS chemical bath deposition have improved our earlier samples. However, this has been found to be less beneficial for newly processed samples reducing the overall processing steps. A textured ZnO window layer deposited on the buffer layer increased device Jsc by 5% by reducing reflectance of incident light.

Cu(InGa)Se/sub 2/ thin films by elemental co-evaporation/sputtering and large area module results

We report process optimization and understanding resulting in high quality Cu(In,Ga)Se/sub 2/ (CIGS) films and high efficiency devices/modules using a hybrid process for CIGS formation. In the hybrid process, the Cu is supplied by magnetron sputtering, and the In, Ga, and Se are supplied by linear thermal sources. The advantages of the hybrid process include: i) the ease and precision of Cu thickness control; and ii) flexibility to adjust the Ga depth profile. The investigation was conducted in a large-area, pilot-line system. Among others, important parameters were found to be the Cu/(In+Ga) ratio of the Cu/(InGa)/sub 2/Se/sub 3/ precursor, selenization temperature, and timing of the Ga and In fluxes. Cell efficiencies of over 13.0% and module efficiencies of 7.5% (26 W, 0.35 m/sup 2/) were achieved. The film properties were investigated by XRD, SEM, and AES.

CIGS devices with ZIS, In/sub 2/S/sub 3/, and CdS buffer layers

The device performances of Cu(In,Ga)Se/sub 2/ solar cells are compared as a function of various buffer layers applied by thermal evaporation that are considered as candidates to replace the conventional CdS buffer layer applied by chemical bath deposition. The buffer layers include ZnIn/sub 2/Se/sub 4/ (ZIS), In/sub 2/Se/sub 3/ and ZnSe. Devices with CdS and ZIS buffers are also studied by EBIC and cathodoluminescence.