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Masuda Noboru

Hitachi

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Publication

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Archive | 2001

ON-CHIP MULTIPLEXER

Kato Takeshi; Yamamoto Michitaka; Kaino Hiromichi; Shimizu Teruhisa; Obayashi Masayuki; Yamashita Hiroki; Masuda Noboru; Saito Tatsuya

Archive | 1994

VARIABLE DELAY CIRCUIT AND CLOCK SIGNAL SUPPLY DEVICE USING VARIABLE DELAY CIRCUIT

Masuda Noboru; Yamamoto Kazumichi; Nakajima Kazunori; Okabe Toshihiro; Yamagiwa Akira; Yamagishi Mikio; Koide Kazuo; Fujita Bunichi; Kawashima Seiichi

Archive | 2004

RADIO COMMUNICATION CONFINEMENT APPARATUS, RADIO COMMUNICATION RELAY STATION, AND RADIO COMMUNICATION BASE STATION

Masuda Noboru; Yano Takashi; Kato Takeshi

Archive | 2001

Signal transmission circuit on semiconductor integrated circuit chip

Masuda Noboru

Archive | 1999

POWER STABILIZING CIRCUIT AND PLL CIRCUIT PROVIDED WITH THE POWER STABILIZING CIRCUIT

Masuda Noboru; Mizuno Kazuhiko

Archive | 1997

PLL CIRCUIT AND FREQUENCY COMPARATOR CIRCUIT

Masuda Noboru; Nakajima Kazunori; Fujita Bunichi; Yamamoto Masakazu; Mizuno Kazuhiko

Archive | 1994

VARIABLE DELAY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING IT

Kawai Shintaro; Yamagishi Mikio; Masuda Noboru

Archive | 2000

DYNAMIC LOGIC CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Masuda Noboru; Yamamoto Michitaka

Archive | 1992

PHASE CONTROL METHOD FOR CLOCK SIGNAL

Fujita Yuzuru; Kawashima Seiichi; Fujita Bunichi; Ishikawa Suketaka; Masuda Noboru

Archive | 1992

VERFAHREN UND VORRICHTUNG ZUM JUSTIEREN EINES TAKTSIGNALS FUER EINEN ELEKTRONISCHEN RECHNER

Fujita Yuzuru; Kawashima Seiichi; Fujita Bunichi; Ishikawa Sakoh; Masuda Noboru

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Fujita Bunichi

Hitachi

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Kawashima Seiichi

Hitachi

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Yamamoto Michitaka

Hitachi

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Fujita Yuzuru

Hitachi

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Kato Takeshi

Hitachi

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Ishikawa Sakoh

Hitachi

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