Matthew R. Page

Efficient black silicon solar cell with a density-graded nanoporous surface: Optical properties, performance limitations, and design rules

We study optical effects and factors limiting performance of our confirmed 16.8% efficiency “black silicon” solar cells. The cells incorporate density-graded nanoporous surface layers made by a one-step nanoparticle-catalyzed etch and reflect less than 3% of the solar spectrum, with no conventional antireflection coating. The cells are limited by recombination in the nanoporous layer which decreases short-wavelength spectral response. The optimum density-graded layer depth is then a compromise between reflectance reduction and recombination loss. Finally, we propose universal design rules for high-efficiency solar cells based on density-graded surfaces.

Multi-scale surface texture to improve blue response of nanoporous black silicon solar cells

We characterize the optical and carrier-collection physics of multi-scale textured p-type black Si solar cells with conversion efficiency of 17.1%. The multi-scale texture is achieved by combining density-graded nanoporous layer made by metal-assisted etching with micron-scale pyramid texture. We found that (1) reducing the thickness of nanostructured Si layer improves the short-wavelength spectral response and (2) multi-scale texture permits thinning of the nanostructured layer while maintaining low surface reflection. We have reduced the nanostructured layer thickness by 60% while retaining a solar-spectrum-averaged black Si reflectance of less than 2%. Spectral response at 450 nm has improved from 57% to 71%.

Effective interfaces in silicon heterojunction solar cells

Thin hydrogenated amorphous silicon (a-Si:H) layers deposited by hot-wire chemical vapor deposition (HWCVD) are investigated for use in silicon heterojunction (SHJ) solar cells on p-type crystalline silicon wafers. A requirement for excellent emitter quality is minimization of interface recombination. Best results necessitate immediate a-Si:H deposition and an abrupt and flat interface to the c-Si substrate. We obtain a record planar HJ efficiency of 16.9% with a high V/sub oc/ of 652 mV on p-type float-zone (FZ) silicon substrates with HWCVD a-Si:H(n) emitters and screen-printed Al-BSF contacts. H pretreatment by HWCVD is beneficial when limited to a very short period prior to emitter deposition.

Well Passivated a-Si:H Back Contacts for Double-Heterojunction Silicon Solar Cells

We have developed hydrogenated amorphous silicon (a-Si:H) back contacts to both p-and n-type silicon wafers, and employed them in double-heterojunction solar cells. These contacts are deposited entirely at low temperature (<250degC) and replace the standard diffused or alloyed back-surface-field contacts used in single-heterojunction (front-emitter only) cells. High-quality back contacts require excellent surface passivation, indicated by a low surface recombination velocity of minority-carriers (S) or a high open-circuit voltage (Voc). The back contact must also provide good conduction for majority carriers to the external circuit, as indicated by a high light I-V fill factor. We use hot-wire chemical vapor deposition (HWCVD) to grow a-Si:H layers for both the front emitters and back contacts. Our improved a-Si:H back contacts contribute to our recent achievement of a confirmed 18.2% efficiency in double-heterojunction silicon solar cells on p-type textured silicon wafers [1]

Crystal silicon heterojunction solar cells by hot-wire CVD

Hot-wire chemical vapor deposition (HWCVD) is a promising technique for fabricating Silicon heterojunction (SHJ) solar cells. In this paper we describe our efforts to increase the open circuit voltage (Voc) while improving the efficiency of these devices. On p-type c-Si float-zone wafers, we used a double heterojunction structure with an amorphous n/i contact to the top surface and an i/p contact to the back surface to obtain an open circuit voltage (Voc) of 679 mV in a 0.9 cm2 cell with an independently confirmed efficiency of 19.1%. This is the best reported performance for a cell of this configuration. We also made progress on p-type CZ wafers and achieved 18.7% independently confirmed efficiency with little degradation under prolong illumination. Our best Voc for a p-type SHJ cell is 0.688 V, which is close to the 691 mV we achieved for SHJ cells on n-type c-Si wafers.

Capacitance Study of Inversion at the Amorphous-Crystalline Interface of n-type Silicon Heterojunction Solar Cells

We use capacitance techniques to directly measure the Fermi level at the crystalline/amorphous interface in n-type silicon heterojunction solar cells. The hole density calculated from the Fermi level position and the inferred band-bending picture show strong inversion of (n)crystalline silicon at the interface at equilibrium. Bias dependent experiments show that the Fermi level is not pinned at the interface. Instead, it moves farther from and closer to the crystalline silicon valence band under a reverse and forward bias, respectively. Under a forward bias or illumination, the Fermi level at the interface moves closer to the crystalline silicon valence band thus increases the excess hole density and band bending at the interface. This band bending further removes majority electrons away from the interface leading to lower interface recombination and higher open-circuit voltage.

High-Efficiency Silicon Heterojunction Solar Cells by HWCVD

We report progresses in the development of silicon heterojunction (SHJ) solar cells by hot-wire chemical vapor deposition (HWCVD). A confirmed 18.2% efficiency on a p-type textured wafer has been achieved based on improvements in surface passivation by a-Si:H emitter and back contact as well as in fill factor. The primary objective of high open-circuit voltage (Voc) is achieved by front a-Si:H/c-Si heterojunction optimization, by replacing a conventional Al-alloyed or P-diffused back-surface field with a back c-Si/a-Si:H heterojunction, and by maintaining excellent surface passivation on textured silicon wafers. We first obtain a Voc of 652 mV with a front a-Si:H(n/i) heterojunction emitter on p-type solar cells with an Al back-surface-field (BSF) contact. The high-temperature Al-BSF is then successfully replaced by low-temperature HWCVD-deposited a-Si:H(i/p) layers as the back contact. Lifetime measurement shows the surface recombination velocity (SRV) is reduced to ~15 cm/sec. A higher Voc of 676 mV is obtained with an a-Si:H(n/i) front-emitter and a-Si:H(i/p) back-contact double-heterojunction SHJ solar cell structure, indicating superior back-surface passivation of the textured p-wafer. On n-type silicon wafers, we use an a-Si:H(p/i) front emitter and an a-Si:H(i/n) back contact, to achieve a Voc of 711 mV, the highest voltage obtained by the HWCVD technique so far. Good fill factors are also obtained using the amorphous-phase materials as the back contacts. S-shaped I-V curves are observed if doping cross-contamination are present among different a-Si:H layers or doping level is not enough in the TCO-contacting p-type a-Si:H layer

Hydrogenated amorphous si deposition for high efficiency a-Si/c-Si heterojunction solar cells

We study the differences in hydrogenated amorphous Si (a-Si:H) depositions between Hot-Wire Chemical Vapor Deposition (HWCVD) and Plasma Enhanced Chemical Vapor Deposition (PECVD) for high efficiency a-Si/c-Si heterojunction (HJ) solar cells. In HWCVD, process gases such as silane decompose from the high-temperature hot filament. The resulting deposition is thought to be gentle due to the lack of ion bombardment that may cause damage to c-Si surface. In PECVD, process gases decompose from a high frequency electric field and ion bombardment is expected during the a-Si:H deposition. We found that the initial minority carrier lifetime of a-Si:H passivated high-quality n-type wafer was higher (about a ms) with the HWCVD process, and the final minority carrier lifetime (after 250°C annealing) was higher (over a few ms) with the PECVD process. These findings suggest that the damage from the ion bombarding in PECVD is not as detrimental as we expected; or if there is damage, it can be repaired by the annealing. We also speculate that the lack of further increase of the lifetime after annealing with HWCVD intrinsic a-Si:H layer can be related to the direct substrate heating from the hot filament during the deposition. A high substrate temperature will promote epi-Si growth and drive hydrogen out of the a-Si/c-Si interface to decrease the quality of surface passivation. To reduce the heating effect, a shutter and a low filament temperature are preferred. With the optimized process, we were able to fabricate HJ solar cells with high open circuit voltage of 714 mV and efficiency greater than 19% on an un-textured n-type wafer using the PECVD process, and independently confirm best efficiency of 19.7% on textured n-type wafer with the HWCVD process.

Implementation of tunneling pasivated contacts into industrially relevant n-Cz Si solar cells

We identify bottlenecks, and propose solutions, to implement a B-diffused front emitter and a backside pc-Si/SiO2 pasivated tunneling contact into high efficiency n-Cz Si cells in an industrially relevant way. We apply an O-precipitate dissolution treatment to make n-Cz wafers immune to bulk lifetime process degradation, enabling robust, passivated B front emitters with J0 <; 20fA/cm2. Adding ultralow recombination n+ pc-Si/SiO2 back contacts enables pre-metallized cells with iVoc=720 mV and J0=8.6 fA/cm2. However, metallization significantly degrades performance of these contacts due to pinholes and possibly, grain boundary diffusion of primary metal and source contaminates such as Cu. An intermediate, doped a-Si:H capping layer is found to significantly block the harmful metal penetration into pc-Si.

Low temperature Si/SiO x /pc-Si passivated contacts to n-type Si solar cells

We describe the design, fabrication, and results of low-recombination, passivated contacts to n-type silicon utilizing thin SiO_x, and plasma enhanced chemical vapor deposited doped polycrystalline-silicon (pc-Si) layers. A low-temperature silicon dioxide layer is grown on both surfaces of an n-type CZ wafer to a thickness of <;20 Å. Next, a thin layer of P-doped plasma enhanced chemical vapor deposited amorphous silicon (n/a-Si:H) is deposited on top of the SiO_x. The layers are annealed to crystallize the a-Si:H and diffuse H to the Si/SiO_x interface, after which a metal contacting layer is deposited over the conducting pc-Si layer. The contacts are characterized by measuring the recombination current parameter of the full-area contact (J_o,contact) to quantify the passivation quality, and the specific contact resistivity (ρ_contact). The Si/SiO_x/pc-Si contact has an excellent J_o,contact = 30 fA/cm² and a good ρ_contact = 29.5 mOhm-cm². Separate processing conditions lowered J_o,contact to 12 fA/cm². However, the final metallization can substantially degrade this contact and has to be carefully engineered. This contact could be easily incorporated into modern, high-efficiency solar cell designs, benefiting performance and yet simplifying processing by lowering the temperature and growth on only one side of the wafer.