Matthew R. Tubbs
IBM
custom integrated circuits conference | 2005
Tom Beacom; Timothy C. Buchholtz; Douglas Hooker Bradley; Jack Chris Randolph; Salvatore N. Storino; Mark Veldhuizen; Sherman M. Dance; Jente B. Kuang; Steve Schwinn; Susan M. Cox; Fred Ziegler; J. Kao; Chuck Li; Christophe Tretz; J. Cabellon; Andrew Patrick Freemyer; Matthew R. Tubbs
This paper describes the design and implementation of the vector scalar unit (VSU) in the first-generation CELL processor. VSU executes floating-point and vector media extension instructions. VSU contains 1.7 million transistors and occupies an area of 3.1 mm/sup 2/ in a 90nm PD-SOI technology. Extensive static and dynamic circuit techniques are used to optimize performance while minimizing area and power simultaneously. Full functionality is observed at 4.76 GHz, 1.3V supply and a chip temperature of 68/spl deg/C.
Archive | 2007
Eric O. Mejdrich; Adam J. Muff; Matthew R. Tubbs
Archive | 2010
Eric O. Mejdrich; Paul E. Schardt; Robert A. Shearer; Matthew R. Tubbs
Archive | 2007
Matthew R. Tubbs
Archive | 2010
Eric O. Mejdrich; Paul E. Schardt; Robert A. Shearer; Matthew R. Tubbs
Archive | 2009
Eric O. Mejdrich; Paul E. Schardt; Robert A. Shearer; Matthew R. Tubbs
Archive | 2008
Stephen Joseph Schwinn; Matthew R. Tubbs; Charles D. Wait
Archive | 2008
Adam J. Muff; Matthew R. Tubbs
Archive | 2012
Adam J. Muff; Paul E. Schardt; Robert A. Shearer; Matthew R. Tubbs
Archive | 2008
Stephen Joseph Schwinn; Matthew R. Tubbs; Charles D. Wait
