Matthias Kuhl

A Wireless Stress Mapping System for Orthodontic Brackets Using CMOS Integrated Sensors

A wireless stress mapping system for the development of “smart brackets” is presented. The system is designed for monitoring the forces and moments applied to individual teeth during orthodontic therapy which may contribute to improve treatment effectiveness. It comprises a stress mapping chip fabricated in a 0.35-μm process and a micro coil produced by gold electroplating in a photoresist mask. Twenty-four transistor-based stress sensors for measuring either in-plane shear stress or the difference of in-plane normal stresses are strategically distributed over the chip area. The sensor signals are processed by a variable-gain differential difference amplifier and digitized by a 10-bit SAR ADC, enabling a resolution down to 11 kPa at highest gain. A wireless interface conditions the energy received at 13.56 MHz and transmits the data by load modulation. With dimensions of 2 × 2.5 × 0.73 mm3 and a power consumption of 1.75 mW, the system lays the foundation for the assembly of smart brackets as innovative tools in orthodontic therapy.

An Integrated Power Supply System for Low Power 3.3 V Electronics Using On-Chip Polymer Electrolyte Membrane (PEM) Fuel Cells

A stabilized power supply realized by chip-integrated micro fuel cells within an extended CMOS process is presented in this paper. The fuel cell system delivers a maximum power output of 450 ¿ W/cm2. The electronic control circuitry consists of an LDO, an on-chip oscillator and a programmable timing network. The core system consumes an average power of 620 nW. The system reaches a current efficiency of up to 92% and provides a constant output voltage of 3.3 V.

CMOS Integrated Stress Mapping Chips with 32 N-Type or P-Type Piezoresistive Field Effect Transistors

This paper reports a novel generation of CMOS stress mapping chips comprising 32 square field effect transistors (FET) with four source/drain contacts (piezo-FETs) exploiting the shear piezoresistive effect in n-type (NMOS) or p-type (PMOS) inversion layers. The sensor chips with a total die area of 2.5 × 2 mm2 are integrated with analog circuitry and digital logic. When exposed to homogenous shear or normal stress, all 32 integrated stress sensors show a linear response in excellent agreement with theoretical predictions and exhibit identical stress sensitivities. Piezo-FETs fabricated as separate devices are characterized with respect to stress sensitivity, intrinsic offset, and noise behavior. Stress sensitivities are enhanced by incorporating a central hole into the piezo-FETs. Sensitivities of -448 ¿V/(V MPa) and 477 ¿V/(V MPa) were measured for NMOS and PMOS devices, respectively.

A telemetric stress-mapping CMOS chip with 24 FET-based stress sensors for smart orthodontic brackets

With ongoing miniaturization in technology and increasing complexity in assembly and packaging, stress-sensing microsystems gain importance for the evaluation of IC packages [1]. Additionally, integrated stress-sensor systems are attractive for miniaturized force and torque sensing in various fields. The chip presented here is designed for the next generation of smart brackets, i.e. intelligent orthodontic brackets serving the orthodontist with measured loads applied to each treated tooth during therapy [2]. Furthermore, wireless communication is beneficial for achieving access to harsh environments and to reduce maintenance [3], and is mandatory for clinical smart brackets.

A 0.01 mm 2 fully-differential 2-stage amplifier with reference-free CMFB using an architecture-switching-scheme for bandwidth variation

This work presents an area-efficient fully-differential 2-stage amplifier as analog pre-amplifier for active neural recording probes. It features an architecture-switching-scheme to reduce the overhead of unused feedback elements in variable-bandwidth-systems, as well as a double-differential self-defining common mode feedback to minimize the biasing overhead. Its area including all feedback elements measures 9,977 μm2, which is more than 2x smaller than previously published neural readout bandpass LNAs. It offers a switchable lower (1 or 140 Hz) and tunable upper (0.24-49 kHz) cut-off frequency with a gain of 26-32 dB and an input noise down to 11.9 μVrms. The LNA consumes 0.1-8.2 μA at 1.8 V and was implemented in a 0.18 μm CMOS technology.

Energy Harvesting and Chip Autonomy

Energy harvesting micro-generators provide alternative sources of energy for many technical and personal applications. Since the power delivered by such miniaturized devices is limited they need to be optimized and adapted to the application. The associated electronics not only has to operate at very low voltages and use little power it also needs to be adaptive to the fluctuating harvesting conditions. A joint development and optimization of transducer and electronics is essential for improved efficiency.

22.6 A 22V compliant 56µW active charge balancer enabling 100% charge compensation even in monophasic and 36% amplitude correction in biphasic neural stimulators

Functional electrical stimulation (FES) is a technique that stimulates nerves by electrical charge, but carries the risk of charge accumulation, voltage pile-up, electrode corrosion and finally tissue destruction. Using biphasic stimulus current pulses, the main transferred charge is compensated by reversing the current direction. However, due to PVT variations in integrated circuits mismatch in the biphasic waveform always occurs. Charge balancing (CB) has thus become an integral part of FES to ensure safe chronic stimulation [1].

Novel instrumented tooth with tenfold increase in force resolution

This paper reports on the progress in the development of the instrumented tooth (IT). The IT is an orthodontic research tool to measure the six components of the force and moment vectors active in artificial dentitions. The new 17-mm-long, 5.2-mm-diameter force/moment (FM) sensor module utilized in the IT shows a significant improvement over previous designs. It consists of two mechanical stress mapping CMOS chips in a back-to-back configuration axially mounted between two metal pins. The resulting resolutions for measuring the force components Fx, Fy, and Fz are 178.mN, 67.mN, and 384.mN, respectively, improving on the state of the art by factors of 2, 11 and 8. With values below 2.15.Nmm, resolutions of the moment components Mx, My, and Mz are comparable to the previous state of the art. However My is better distinguished from Fz than before. Force and moment ranges are at least ±15.N and ±30.Nmm, respectively.

Energy-Harvesting Applications and Efficient Power Processing

In comparison to the original chapter in CHIPS 2020 Manoli et al. (CHIPS 2020—A Guide to the Future of Nanoelectronics: 329–420, 2012) [1], this chapter presents more application-oriented research with a focus on wearable devices and condition monitoring. It also covers electronic circuit components and systems employed in extracting, processing, and storing the harvested power. In the meantime, many innovative enhancements in terms of efficiency and applicability have been achieved by developing dedicated CMOS integrated circuits.

In-vivo characterization of a 0.8 – 3 µV RMS input-noise versatile CMOS pre-amplifier

The following work presents a CMOS-integrated low-noise pre-amplifier (LNA) for bio-potential recordings, which is part of a multi-channel neural recording system. The versatile pre-amplifier channel features a tunable lower cut-off frequency from 0.2 Hz to 10 kHz, an upper cut-off frequency from 37.9 Hz to 11 kHz, and a middle-band gain from 41 to 45 dB. With its variable power consumption from 3.3 μW to 1 mW, the input-referred noise can be set from 2 down to 0.8 μVRMS. The pre-amplifier, fabricated in a 0.35 μm CMOS process, was successfully tested for ECG, EMG, and EEG applications.