Mehdi Kabir

Spintronics technology: past, present and future

Spintronics has emerged in the last two decades as both an extremely fruitful direction of research into the properties and usefulness of the spin degree of freedom of the electron as it can apply to the exponentially expanding world of electronics. Spintronics has infiltrated almost every household in the form of the read head sensors for the hard drives that inhabit every desktop and most laptop computers. Embedded magnetic random access memory (MRAM) and in-plane STT-RAM are rapidly replacing SRAM in a host of applications that do not require ultra-dense memories. Soon these embedded spintronic memories will permeate the cell phone market because they are much denser than SRAM, offer lower power at only slightly lower speed and are non-volatile. The present work in spintronics at most of the mainstream semiconductor companies and foundaries is focused on the development of perpendicular STT-MRAM, as a universal memory that can compete with the mainstream memories and surpass them in several key metrics. Several innovative ideas are presented where spintronics may have an impact because of the uniqueness of the approach. Nanomagnetic logic and storage may offer extremely high densities at very low power. Spin-torque oscillators are a very novel approach to pattern recognition that may be relevant for handling massive data sets. The spin of the electron may also be on the critical path for quantum computation or communication, another revolutionary change in how we process information.

Computing with Hybrid CMOS/STO Circuits

Recent research in spin torque nano-oscillators (STNO) have opened the possibility of using electron spin to generate sustained microwave oscillations. Furthermore, the experimental verification of synchronization of STNOs could allow communication and computation with nanoscaled oscillators. In this paper, we propose a hybrid MOSFET/STNO array which can be used for pattern recognition applications. First, we show that an array of electrically coupled STNOs obey the dynamics of Kuramotos weakly coupled oscillators [1]. This behavior allows us to use the STNO array to implement the oscillatory neurocomputer proposed by Hoppensteadt et. al. [2]. We next consider practical STNO device geometries which can be used in a parallel-connected array. We propose using a dual barrier magnetic tunnel junction (DMTJ) to produce strong, harmonic oscillation signals in the absence on an external magnetic field. Finally, we perform HSPICE simulations of a hybrid MOSFET/STNO array to show how it can be used for pattern recognition.

RAMA: a self-assembled multiferroic magnetic QCA for low power systems

Recently, with the discovery of multiferroic materials, there has been a great interest in creating logic devices which exploit both magnetic and electric properties of these materials. This paper proposes a reconfigurable array of magnetic automata (RAMA) made of multiferroic nanopillars which can be operated using electric fields. Furthermore, due to the switching nature of these nanopillars, the array can be reconfigured to implement multiple logic circuits in a similar fashion to FPGAs. The paper proposes a compact model of the multiferroic switching mechanism which can be used to describe the behavior of the nanopillars in a circuit simulator. In addition, results from micromagnetic simulations of the MQCA bits indicate that it can operate with energy consumptions that are magnitudes lower than conventional CMOS technologies. Finally, the paper discusses the reliability of the nanopillar switching and suggests ways to optimize the error rates.

Electronic ratchet: A non-equilibrium, low power switch

In this paper, we present a novel computing paradigm using a non-equilibrium electronic ratchet which is capable of driving current in the absence of an applied drain bias. By using a time varying, spatially asymmetric potential, we demonstrate that it is possible to create a net current from drift-diffusion processes of charge carriers. This is especially useful in reducing static dissipation encountered in conventional logic circuits. In addition, since the electronic ratchet acts as voltage-controlled current source, we find that the dynamic dissipation associated with charging/discharging of load capacitors is also decreased. Furthermore, we show that the ratchet device is naturally amenable to a dissipation reduction technique known as adiabatic clocking. Because of the unique charging mechanism of the ratchet, timing constraints on logic inputs—an important drawback of conventional adiabatic circuits—are not needed to achieve adiabatic computation.

Spin torque nano oscillators as key building blocks for the systems-on-chip of the future

Emerging nanotechnologies have the potential to completely revolutionize the semiconductor industry by providing “more than Moore” capabilities. Instead of trying to compete in areas where conventional CMOS is still dominant, such as digital processing, emerging technologies can provide a perfect complement to CMOS in areas where conventional solutions are not scaling, such as memory, interconnect, analog and mixed-signal, and RF. This paper focuses on the application of such an emerging nanotechnology, Spin Torque Nano Oscillators (STNOs), for on-chip mixed-signal and RF applications. Bulky and power-hungry CMOS active (e.g. oscillators and amplifiers) and passive (e.g. capacitors and spiral inductors) elements can be replaced by single STNO nanodevice with improved overall metrics: small footprint of the order of 100nm on a side, low power, high-Q, tunability, etc. Additionally, since STNOs fundamentally use similar materials and geometries as Spin Torque Transfer RAM (STT-RAM), they can be readily integrated on chip and can benefit from all advances in that field. This paper proposes a new STNO device structure appropriate for on-chip mixed-signal and RF applications, as well as several hybrid STNO/CMOS circuits that take advantage of the STNO device characteristics to obtain desired behaviors, such as frequency generation, pass and notch filters, etc.

Computing With Nonequilibrium Ratchets

Electronic ratchets transduce local spatial asymmetries into directed currents in the absence of a global drain bias by rectifying temporal signals that reside far from the thermal equilibrium. We show that the absence of a drain bias can provide distinct energy advantages for computation, specifically, reducing static dissipation in a logic circuit. Since the ratchet functions as a gate voltage-controlled current source, it also potentially reduces the dynamic dissipation associated with charging/discharging capacitors. In addition, the unique charging mechanism eliminates timing-related constraints on logic inputs, in principle allowing for adiabatic charging. We calculate the ratchet currents in classical and quantum limits, and show how a sequence of ratchets can be cascaded to realize universal Boolean logic.

Synchronized Spin Torque Nano-Oscillators: From Theory to Applications

Spintronics is a very promising emerging technology which has already enabled several market products–from hard disk read heads to dense memories. Recent research in spin torque nano-oscillators (STNO) has opened the possibility of using electron spin to generate sustained microwave oscillations. Furthermore, the experimental verification of synchronization of STNOs can allow communication and computation with nanoscale oscillators. In this work, we look at a promising novel circuit topology using a hybrid MOSFET/STNO array which can be used for diverse sets of applications ranging from neurocomputation to nano-scale RF applications. We first consider the physics and oscillatory theory which allows the STNOs to synchronize and communicate with each other. We next focus on the practical STNO device geometries which can be used to realize a physical parallel-connected array. We propose using a dual barrier magnetic tunnel junction (DMTJ) to produce strong, harmonic oscillation signals in the absence on an external magnetic field. Finally, we use circuit level simulations of a hybrid MOSFET/STNO array to show how it can be used for different applications.

Self-assembled multiferroic magnetic QCA structures for low power systems

The discovery of multiferroic materials has lead to a great interest in creating logic circuits which exploit both the magnetic and electrical properties of these materials. In this work we focus on self-assembled array structures of Magnetic Quantum Cellular Automata (MQCA) composed of multiferroic nanopillars which can be configured and clocked using solely electric fields. Furthermore, due to the switching nature of these nanopillars, the arrays can be reconfigured to implement read/write memory or multiple logic circuits in a similar fashion to FPGAs. Finally, we develop a SPICE model for the multiferroic nanopillars and demonstrate the functionality of the array.

Nano-pattemed coupled spin torque nano oscillator (STNO) arrays — A potentially disruptive multipurpose nanotechnology

This work focuses on the modeling, simulation, design space exploration and applications for Spin Torque Nano Oscillators (STNOs), with special emphasis on nano-arrays of such oscillators formed using patterned magnetic tunnel junctions (MTJs) with modulated coupling either through spin waves in the substrate or through electrical coupling with AC currents to the leads of the STNOs. This interesting coupling behavior of STNO arrays can allow their use as associative memories.

Switching limits in nano-electronic devices

Present day CMOS transistors operate by thermionic emission of electrons over a gate tunable barrier. The fundamental switching energy for each such switching event can be derived from equilibrium thermodynamic considerations. While clever ways can sometimes mitigate the power budget, more often than not, this involves trade-offs with short channel effects (variability), on-off ratio (reliability) and mobility (switching speed). We discuss switching paradigms that venture beyond the near-equilibrium operation of transistors involving the absence or presence of charges as the digital switching bits. To this end, a few case studies are presented. Dipolar switching is invoked as an example to show how gating non-electronic degrees of freedom can reduce the subthreshold swing below the textbook limit by acting as an added cut-off filter on the current. We discuss how new state variables may be engineered into a CMOS platform to enable such non-electronic switching. Another, completely different direction involves non-equilibrium switching, such as a ratchet that allows us to move charges unidirectionally without a drain bias, by using instead an always present AC clock signal adiabatically coupled with the gate.