Mehmet Ozgur

Characterization of broad-band transmission for coplanar waveguides on CMOS silicon substrates

This paper presents characteristics of microwave transmission in coplanar waveguides (CPWs) on silicon (Si) substrates fabricated through commercial CMOS foundries. Due to the CMOS fabrication, the metal strips of the CPW are encapsulated in thin films of Si dioxide. Many test sets were fabricated with different line dimensions, all on p-type substrates with resistivities in the range from 0.4 /spl Omega//spl middot/cm to 12.5 /spl Omega//spl middot/cm. Propagation constant and characteristic impedance measurements were performed at frequencies from 0.1 to 40 GHz, using a vector-network analyzer and the through-reflect-line (TRL) deembedding technique. A quasi-TEM equivalent circuit model was developed from the available process parameters, which accounts for the effects of the electromagnetic fields in the CPW structure over a broad frequency range. The analysis was based on the conformal mapping of the CPW multilayer dielectric cross section to obtain accurate circuit representation for the effects of the transverse fields.

High Q backside micromachined CMOS inductors

Spiral inductors that are fabricated through a CMOS process, are micromachined by using a new post-processing procedure. In this new technique, the inductors are supported mechanically prior to etching with a low-loss host substrate, and the silicon substrate is selectively etched from the backside. A scalable physical model for such inductors is developed. The results from the model are in good agreement with the measurements. Significant performance improvements are achieved without compromising the mechanical robustness of the fully integrated inductors. By using a 1.2 /spl mu/m CMOS technology, a quality factor of 10.5 is measured at 4.6 GHz for 8.9 nH inductor.

Optimization of backside micromachined CMOS inductors for RF applications

The quality factor of backside micromachined CMOS inductors is optimized for high frequency applications. Up to 90% improvement of the peak quality factor is predicted for 10 nH inductors according to the simulations over previously published results in this technology. Extensive tests will be performed for the fabricated inductors with an improved post-processing procedure.

Quasi-TEM characteristic impedance of micromachined CMOS coplanar waveguides

Micromachined coplanar waveguides (CPWs) fabricated in CMOS technology consist of glass-encapsulated metal conductor strips, fully suspended by selective etching of the silicon substrate. The minimum amount of etching necessary for proper operation of the micromachined waveguides is determined by using an isolation criterion. In this paper, the quasi-TEM characteristic impedance of a CPW is derived, including the finite conductor thickness and the thicknesses of surrounding dielectric layers. The employed analytical approach is based on conformal mapping and the partial capacitance technique. The losses both in conductor and dielectric layers are neglected. The analytical results and proposed approximations are verified by integral-equation computation and by measurement of various sample structures.

Micromachined 28-GHz power divider in CMOS technology

A broad-band power divider is presented in CMOS technology. The devices are realized by postprocessing chips that are fabricated in a standard 1.2-μm CMOS process. Developed postprocessing includes wire bonding for ground equalization, deposition of a stress-compensation layer, and selective etching of the silicon substrate. By employing coupled coplanar transmission lines, the area of dividers is minimized to 0.8 mm×2.1 mm. A 20-35 GHz power divider exhibits a coupling of -3.8 dB/spl plusmn/0.6 dB.

Micromachined branch line coupler in CMOS technology

An internally ground-equalized coplanar branch line coupler (BLC) is fabricated by post-processing 2poly/2metal analog CMOS chips. First level metallization is used to equalize the ground planes, hence to suppress the unwanted coupled-slot-line mode propagation. This addition necessitates additional compensation of signal lines to improve the return losses. Fabricated CMOS chips are post-processed with a two-step procedure. First, a thick polyimide film is screen-printed on the devices as a stress-compensation. Then, the silicon substrate is selectively removed underneath the devices. The measured responses show very good agreement with simulations. Fabricated devises exhibit return losses less than 10 dB and maximum of 1 dB amplitude difference in the frequency range of 25-30 GHz.

Characterization of micromachined CMOS transmission lines for RF communications

This work reports on the analytical and experimental characterization of micromachined microwave transmission lines used in RF communication applications. New analytic approximations are derived for the quasi-static capacitance of coplanar transmission lines with finite metallization thickness. The expressions are well suited for CAD applications since they are compact and scalable. Furthermore, their accuracy is comparable with the fabrication tolerances and measurement accuracy achievable.

RF MEMS components using CMOS technology

Recently microelectromechanical systems (MEMS) devices have become an important technology that is used in many applications. We describe post-processing steps of CMOS technology to implement a MEMS structure suitable for RF systems. We describe CMOS-based monolithic MEMS structures suitable for realizing passive RF components operating at frequencies of up to 60 GHz. Examples of RF MEMS components - inductors, switches and tunable capacitors, and coplanar transmission lines - realized in this technology are given.