Mei Yin Chan

Ge nanocrystals in lanthanide-based Lu2O3 high-k dielectric for nonvolatile memory applications

Ge nanocrystals embedded in lanthanide-based high-k dielectric (amorphous Lu2O3 in this work) were formed using pulsed laser deposition followed by rapid thermal annealing in N2 ambient. The formation and evolution of the Ge nanocrystals have been studied using transmission electron microscopy (TEM), x-ray photoelectron spectroscopy (XPS) in conjunction with depth profiling, and secondary ion mass spectroscopy (SIMS) analysis. Plan-view TEM images indicated that the formation of nanocrystals was first initiated during the deposition process. The annealing treatment significantly enhanced the nucleation of Ge nanocrystals, resulting in a high areal density of 7×1011cm−2 Ge nanocrystals with a mean size of about 6nm in diameter in the amorphous Lu2O3 matrix. XPS depth profile analysis revealed that Ge nanocrystals were predominantly formed from the precipitation of Ge nuclei from the oxide phase. A low annealing temperature of 400°C was sufficient to dissociate the GeO2 and GeOx leading to the formation of ...

Leakage conduction mechanism of amorphous Lu2O3 high-k dielectric films fabricated by pulsed laser ablation

Amorphous Lu2O3 thin films have been deposited on p-type (111) Si substrates by pulsed laser deposition (PLD). A equivalent oxide thickness (EOT) of 1.16 nm with a leakage current density of 4×10−5 A/cm2 at 1 V accumulation bias was obtained for 4.5 nm thick Lu2O3 thin film deposited at room temperature followed by post-deposition anneal (PDA) at 600 °C in oxygen ambient. The leakage conduction mechanisms of amorphous Lu2O3 films were investigated. It was found that the Poole-Frenkel (P-F) emission is the dominant conduction mechanism at high electric field region.

Lu2O3∕Al2O3 gate dielectrics for germanium metal-oxide-semiconductor devices

Effect of Ge out diffusion into Lu2O3∕Al2O3 high-k dielectric stack was investigated. Increasing Ge signal intensity with increasing annealing temperature was observed, which suggests that there may be excessive Ge incorporation into the high-k film. The electrical measurement shows an improvement of the k value with annealing temperature, as well as an increasing trend in the leakage current density suggesting degradation in electrical performance due to Ge incorporation. Our work suggests that 8.8at.% of Ge in the film is excessive and result in degradation of the electrical performance of the device due to the increased leakage current.

Lanthanide-based graded barrier structure for enhanced nanocrystal memory properties

A memory structure comprising Ge nanocrystals and lanthanide-based charge trapping dielectric stack was fabricated to realize a self-aligned graded barrier structure. By exploiting efficient charge trapping of the nanocrystals embedded in the heterogeneous high-k dielectric, strong memory effect was manifested by a large counterclockwise capacitance-voltage hysteresis of 2.7 V under a low voltage operation of ±4 V. The high-k barrier with graded composition provides a favorable confinement barrier for improved hole retention with simultaneous enlargement of the memory window.

Al2O3 nanocrystals embedded in amorphous Lu2O3 high-k gate dielectric for floating gate memory application

The integration of nanoparticles has high potential in technological applications and opens up possibilities of the development of new devices. Compared to the conventional floating gate memory, a structure containing nanocrystals embedded in dielectrics shows high potential to produce a memory with high endurance, low operating voltage, fast write-erase speeds and better immunity to soft errors [S. Tiwari, F. Rana, H. Hanafi et al. 1996 Appl.Phys. Lett. 68, 1377]. A significant improvement on data retention [J. J. Lee, X. Wang et al. 2003 Proceedings of the VLSI Technol. Symposium, p33] can be observed when discrete nanodots are used instead of continuous floating gate as charge storage nodes because local defect related leakage can be reduced efficiently. Furthermore, using a high-k dielectric in place of the conventional SiO2 based dielectric, nanodots flash memory is able to achieve significantly improved programming efficiency and data retention [A. Thean and J. -P. Leburton, 2002 IEEE Potentials 21, 35; D. W. Kim, T. Kim and S. K. Banerjee, 2003 IEEE Trans. Electron Devices 50, 1823]. We have recently successfully developed a method to produce nanodots embedded in high-k gate dielectrics [C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Electrochemical and Solid-State Letters 9, F53; C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Europhys. Lett. 74, 177]. In this paper, we fabricated the memory structure of Al2O3 nanocrystals embedded in amorphous Lu2O3 high k dielectric using pulsed laser ablation. The mean size and density of the Al2O3 nanocrystals are estimated to be about 5 nm and 7x1011 cm−2, respectively. Good electrical performances in terms of large memory window and good data retention were observed. Our preparation method is simple, fast and economical.

FABRICATION OF SILICON NANOCRYSTALS AND ITS ROOM TEMPERATURE LUMINESCENCE EFFECTS

Silicon (Si) nanocrystals have been considered a good candidate for flash memory device and nanophotonic applications. The fabrication of nanocrystal memory is to form uniform, small size and high density quantum dots. In this study, nanometer-scale silicon quantum dots have been fabricated on ultrathin silicon oxide layer using amorphous silicon (a-Si) deposition followed by various annealing treatments. The a-Si layers were crystallized using furnace annealing, laser annealing and rapid thermal annealing (RTA). After annealing to form nanometer-sized crystallites, silicon wet etch was carried out to isolate the nanocrystals. The size, uniformity and density of the nanocrystals were successfully controlled by different annealing treatments. The mean dot height and mean dot diameter is 1–5 nm and 2–5 nm, respectively. Lateral growth of the silicon dots was further controlled by systemic variations of the annealing conditions. It is found that the annealed a-Si films exhibit room temperature visible photoluminescence (PL) resulting from the formation of nanometer-sized crystallites. Selective wet etch and Secco-etch treatment increased the PL efficiency that is useful for nanophotonics applications. The feasibility of quantum dot formation using ultra thin amorphous Si films is demonstrated in this work.

Conductivity Changes Of Conducting Polymers With Electro‐statically Bonded Counter‐ions For Organic Memories

In this work, polyaniline: polystyrene sulfonated (PANI: PSS) spin‐coated on ITO glass topped by gold electrodes results in a highly conductive junction which can be open circuited by application of a high current density. The conduction mechanism changes from an ohmic contact to a non‐ohmic contact after electrical bias application, and is believed to be due to phase segregation of the electro‐statically bonded PANI and PSS at the polymer interface. We believe this phase segregation behavior is applicable for organic resistive memory function.