Mengwei Si

Switching Mechanism in Single-Layer Molybdenum Disulfide Transistors: An Insight into Current Flow across Schottky Barriers

In this article, we study the properties of metal contacts to single-layer molybdenum disulfide (MoS2) crystals, revealing the nature of switching mechanism in MoS2 transistors. On investigating transistor behavior as contact length changes, we find that the contact resistivity for metal/MoS2 junctions is defined by contact area instead of contact width. The minimum gate dependent transfer length is ∼0.63 μm in the on-state for metal (Ti) contacted single-layer MoS2. These results reveal that MoS2 transistors are Schottky barrier transistors, where the on/off states are switched by the tuning of the Schottky barriers at contacts. The effective barrier heights for source and drain barriers are primarily controlled by gate and drain biases, respectively. We discuss the drain induced barrier narrowing effect for short channel devices, which may reduce the influence of large contact resistance for MoS2 Schottky barrier transistors at the channel length scaling limit.

Molecular Doping of Multilayer

For the first time, polyethyleneimine (PEI) doping on multilayer MoS2 field-effect transistors is investigated. A 2.6 times reduction in sheet resistance and 1.2 times reduction in contact resistance have been achieved. The enhanced electrical characteristics are also reflected in a 70% improvement in ON-current and 50% improvement in extrinsic field-effect mobility. The threshold voltage confirms a negative shift upon the molecular doping. All studies demonstrate the feasibility of PEI molecular doping in MoS2 transistors and its potential applications in layer-structured semiconducting 2-D crystals.

{\rm MoS}_{2}

Monolayer molybdenum disulfide (MoS2) with a direct band gap of 1.8 eV is a promising two-dimensional material with a potential to surpass graphene in next generation nanoelectronic applications. In this Letter, we synthesize monolayer MoS2 on Si/SiO2 substrate via chemical vapor deposition (CVD) method and comprehensively study the device performance based on dual-gated MoS2 field-effect transistors. Over 100 devices are studied to obtain a statistical description of device performance in CVD MoS2. We examine and scale down the channel length of the transistors to 100 nm and achieve record high drain current of 62.5 mA/mm in CVD monolayer MoS2 film ever reported. We further extract the intrinsic contact resistance of low work function metal Ti on monolayer CVD MoS2 with an expectation value of 175 Ω·mm, which can be significantly decreased to 10 Ω·mm by appropriate gating. Finally, field-effect mobilities (μFE) of the carriers at various channel lengths are obtained. By taking the impact of contact resistance into account, an average and maximum intrinsic μFE is estimated to be 13.0 and 21.6 cm(2)/(V s) in monolayer CVD MoS2 films, respectively.

Field-Effect Transistors: Reduction in Sheet and Contact Resistances

Phosphorene is a unique single elemental semiconductor with two-dimensional layered structures. In this letter, we study the transistor behavior on mechanically exfoliated few-layer phosphorene with the top-gate. We achieve a high ON-current of 144 mA/mm and hole mobility of 95.6 cm2/V·s. We deposit Al2O3 by atomic layer deposition (ALD) and study the effects of dielectric capping. We observe that the polarity of the transistors alternated from p-type to ambipolar with Al2O3 grown on the top. We attribute this transition to the changes for the effective Schottky barrier heights for both electrons and holes at the metal contact edges, which is originated from fixed charges in the ALD dielectric.

Statistical study of deep submicron dual-gated field-effect transistors on monolayer chemical vapor deposition molybdenum disulfide films.

In this letter, we report on high-performance depletion/enhancement-mode β-Ga₂O₃ on insulator (GOOI) field-effect transistors (FETs) with record high drain currents (I_D) of 600/450 mA/mm, which are nearly one order of magnitude higher than any other reported I_D values. The threshold voltage (V_T) can be modulated by varying the thickness of the β-Ga₂O₃ films and the E-mode GOOI FET can be simply achieved by shrinking the β-Ga₂O₃ film thickness. Benefiting from the good interface between β-Ga₂O₃ and SiO₂ and wide bandgap of β-Ga₂O₃, a negligible transfer characteristic hysteresis, high I_D ON/OFF ratio of 10¹⁰, and low subthreshold swing of 140 mV/decade for a 300-nm-thick SiO₂ are observed. E-mode GOOI FET with source to drain spacing of 0.9-μm demonstrates a breakdown voltage of 185 V and an average electric field (E) of 2 MV/cm, showing the great promise of GOOI FET for future power devices.

The Effect of Dielectric Capping on Few-Layer Phosphorene Transistors: Tuning the Schottky Barrier Heights

High-performance MoS2 transistors scaled down to 100 nm are studied at various temperatures down to 20 K, where a highest drive current of 800 μA μm(-1) can be achieved. Extremely low electrical noise of 2.8 × 10(-10) μm(2) Hz(-1) at 10 Hz is also achieved at room temperature. Furthermore, a negative differential resistance behavior is experimentally observed and its origin of self-heating is identified using pulsed-current-voltage measurements.

High-Performance Depletion/Enhancement-ode

Experimental demonstrations of one-dimensional (1D) van der Waals material tellurium (Te) have been presented by Raman spectroscopy under strain and magneto-transport. Raman spectroscopy measurements have been performed under strains along different principle axes. Pronounced strain response along the c-axis is observed due to the strong intrachain covalent bonds, while no strain response is obtained along the a-axis due to the weak interchain van der Waals interaction. Magneto-transport results further verify its anisotropic property, which results in dramatically distinct magneto-resistance behaviors in terms of three different magnetic field directions. Specifically, phase coherence length extracted from weak antilocalization effect, Lϕ ≈ T-0.5, claims its two-dimensional (2D) transport characteristics when an applied magnetic field is perpendicular to the thin film. In contrast, Lϕ ≈ T-0.33 is obtained from universal conductance fluctuations once the magnetic field is along the c-axis of Te, which indicates its nature of 1D transport along the helical atomic chains. Our studies, which are obtained on high quality single crystal Te thin film, appear to serve as strong evidence of its 1D van der Waals structure from experimental perspectives. It is the aim of this paper to address this special concept that differs from the previous well-studied 1D nanowires or 2D van der Waals materials.

\beta

InGaAs gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs) with 6 nm nanowire thickness have been experimentally demonstrated at sub-80 nm channel length. The effects of forming gas anneal (FGA) on the performance of these devices have been systematically studied. The 30 min 400 °C FGA (4% H2/96% N2) is found to improve the quality of the Al2O3/InGaAs interface, resulting in a subthreshold slope reduction over 20 mV/dec (from 117 mV/dec in average to 93 mV/dec). Moreover, the improvement of interface quality also has positive impact on the on-state device performance. A scaling metrics study has been carried out for FGA treated devices with channel lengths down to 20 nm, indicating excellent gate electrostatic control. With the FGA passivation and the ultra-thin nanowire structure, InGaAs MOSFETs are promising for future logic applications.

-Ga2O3 on Insulator (GOOI) Field-Effect Transistors With Record Drain Currents of 600/450 mA/mm

Gate-all-around (GAA) transistors use multiple parallel nanowires to achieve the desired ON current. The fabrication and performance of GAA transistors have been reported, however, a fundamental consideration, namely, the scaling and variability of transistor performance as a function of the number of parallel NWs is yet to be discussed. In this paper, we (i) examine how the overall performance matrix (e.g., ION, IOFF, Vth, SS, RC) depends on the number of parallel NWs, (ii) theoretically interpret the results in terms of variability and self-heating among the NWs, (iii) compare the reliability of multiple NW devices (ΔVth, ΔSS, both stress and recovery) with a planar device of similar technology. We find that the self-heating and NW-to-NW variability are reflected in novel properties of variability and reliability of GAA transistors that are neither anticipated nor observed in the corresponding planar technology.

Performance Potential and Limit of MoS2 Transistors

The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec−1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption1,2. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier3. Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel4–12. Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm−1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.A field-effect MoS2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.