Meysam Azin

Restoration of function after brain damage using a neural prosthesis

Significance Closed-loop systems, or brain–machine–brain interfaces (BMBIs), have not been widely developed for brain repair. In this study, we targeted spared motor and somatosensory regions of the rat brain after traumatic brain injury for establishment of a functional bridge using a battery-powered microdevice. The results show that by using discriminated action potentials as a trigger for stimulating a distant cortical location, rapid recovery of fine motor skills is facilitated. This study provides strong evidence that BMBIs can be used to bridge damaged neural pathways functionally and promote recovery after brain injury. Although this study is restricted to a rodent model of TBI, it is likely that the approach will also be applicable to other types of acquired brain injuries. Neural interface systems are becoming increasingly more feasible for brain repair strategies. This paper tests the hypothesis that recovery after brain injury can be facilitated by a neural prosthesis serving as a communication link between distant locations in the cerebral cortex. The primary motor area in the cerebral cortex was injured in a rat model of focal brain injury, disrupting communication between motor and somatosensory areas and resulting in impaired reaching and grasping abilities. After implantation of microelectrodes in cerebral cortex, a neural prosthesis discriminated action potentials (spikes) in premotor cortex that triggered electrical stimulation in somatosensory cortex continuously over subsequent weeks. Within 1 wk, while receiving spike-triggered stimulation, rats showed substantially improved reaching and grasping functions that were indistinguishable from prelesion levels by 2 wk. Post hoc analysis of the spikes evoked by the stimulation provides compelling evidence that the neural prosthesis enhanced functional connectivity between the two target areas. This proof-of-concept study demonstrates that neural interface systems can be used effectively to bridge damaged neural pathways functionally and promote recovery after brain injury.

A Miniaturized System for Spike-Triggered Intracortical Microstimulation in an Ambulatory Rat

This paper reports on a miniaturized system for spike-triggered intracortical microstimulation (ICMS) in an ambulatory rat. The head-mounted microdevice comprises a previously developed application-specific integrated circuit fabricated in 0.35-μm two-poly four-metal complementary metal-oxide-semiconductor technology, which is assembled and packaged on a miniature rigid-flex substrate together with a few external components for programming, supply regulation, and wireless operation. The microdevice operates autonomously from a single 1.55-V battery, measures 3.6 cm × 1.3 cm × 0.6 cm, weighs 1.7 g (including the battery), and is capable of stimulating as well as recording the neural response to ICMS in biological experiments with anesthetized laboratory rats. Moreover, it has been interfaced with silicon microelectrodes chronically implanted in the cerebral cortex of an ambulatory rat and successfully delivers electrical stimuli to the second somatosensory area when triggered by neural activity from the rostral forelimb area with a user-adjustable spike-stimulus time delay. The spike-triggered ICMS is further shown to modulate the neuronal firing rate, indicating that it is physiologically effective.

A high-output-impedance current microstimulator for anatomical rewiring of cortical circuitry

This paper reports on the design, implementation, and performance characterization of a high-output-impedance current microstimulator fabricated using the TSMC 0.35 mum 2P/4M n-well CMOS process as part of a fully integrated neural implant for reshaping long-range intracortical connectivity patterns in an injured brain. It can deliver a maximum current of 94.5 muA to the target cortical tissue with current efficiency of 86% and voltage compliance of 4.7 V with a 5-V power supply. The stimulus current can be programmed via a 6-bit DAC with an accuracy better than 0.47 LSB. Stimulator functionality is also verified with in vitro experiments in saline using a silicon microelectrode with iridium oxide (IrO) stimulation sites.

A 94-μW 10-b neural recording front-end for an implantable brain-machine-brain interface device

This paper describes a fully integrated neural recording front-end comprising a low-noise two-stage amplification circuitry and a 10-b successive approximation register (SAR)-based ADC as part of a fully implantable brain-machine-brain interface (BMBI) device for neuroanatomical rewiring of cortical circuitry in an injured brain. Fabricated using the TSMC 0.35 mum 2P/4M n-well CMOS process, the ac-coupled amplification circuitry provides a maximum mid-band ac gain of ~52 dB and features a measured input-referred voltage noise of 3.5 muVrms from 0.1 Hz to 12.8 kHz, while dissipating ~78 muW from 2 V. The SAR ADC features an ENOB of ~9.4 for maximum sampling frequency of ~45 kSa/s, while dissipating only 16 muW. Benchtop as well as in vitro measurement results in saline are reported.

Comparisons of FIR and IIR Implementations of a Subtraction-Based Stimulus Artifact Rejection Algorithm

Finite impulse response (FIR) and infinite impulse response (IIR) temporal filtering techniques are investigated to assess the feasibility of very-large-scale-integrated (VLSI) implementation of a subtraction-based stimulus artifact rejection (SAR) algorithm in implantable, closed-loop neuroprostheses. The two approaches are compared in terms of their system architectures, overall performances, and the associated computational costs. Pre-recorded neural data from an Aplysia californica are used to demonstrate the functionality of the proposed implementations. Digital building blocks for an FIR-based system are also simulated in a 0.18-mum CMOS technology, showing a total power consumption of <5 muW from a 1-V supply and a die area of ~1.5 mm2. An IIR-based system can further reduce the required power consumption and die area.

An activity-dependent brain microstimulation SoC with integrated 23nV/rtHz neural recording front-end and 750nW spike discrimination processor

This paper describes an activity-dependent intracortical microstimulation system-on-chip (SoC) that can convert extracellular neural signals recorded from one brain region to electrical stimuli delivered to another brain region in real-time. The system integrates an analog recording front-end with input noise voltage of 2.6µVrms in 10.5kHz bandwidth, 5.5µW 10b SAR ADC, 750nW digital spike discrimination processor, and a charge-balanced constant-current stimulating back-end that can deliver up to 94.5µA with 6b resolution when triggered by neural activity. Electrical performance characterization and biological measurement results from a prototype chip fabricated in 0.35µm 2P/4M CMOS are presented.

Towards a Brain-Machine-Brain Interface (BMBI) for Anatomical Rewiring of Cortical Circuitry

One major hurdle in designing prosthetic devices to restore function after brain injury is the inability for the mature brain to reestablish normal neuronal connection patterns. Combining neurobiological tools with state-of-the-art implantable device technology could potentially offer a novel approach for orchestrating new long-range connections in the cerebral cortex after injury. In this paper, we report on our progress towards developing a fully implantable brain-machine- brain interface (BMBI) to reshape cortical connections after brain injury by coupling activity between distant cortical locations using CMOS-integrated recording, neural signal processing, and microstimulation circuitry.