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Michael Catherwood

Microchip Technology

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Publication

Featured researches published by Michael Catherwood.

Archive | 2001

Repeat instruction with interrupt

Michael Catherwood; Joseph W. Triece

Archive | 2010

PROGRAMMABLE EXCEPTION PROCESSING LATENCY

Michael Catherwood; David Mickey

Archive | 2001

Modified Harvard architecture processor having program memory space mapped to data memory space

James H. Grosbach; Joshua M. Conner; Michael Catherwood

Archive | 2001

Bit replacement and extraction instructions

Brian Boles; Michael Catherwood

Archive | 2005

Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection

Michael Catherwood

Archive | 2001

Dynamically reconfigurable data space

Michael Catherwood; Joseph W. Triece; Michael Pyska; Joshua M. Conner

Archive | 2001

Modulo addressing based on absolute offset

Michael Catherwood

Archive | 2001

Shadow register array control instructions

Michael Catherwood; Joseph W. Triece

Archive | 2001

Low overhead interrupt

Michael Catherwood; Joseph W. Triece; Rodney Drake

Archive | 2014

Programmable CPU Register Hardware Context Swap Mechanism

Michael Catherwood; Bryan Kris; David Mickey; Joseph Kanellopoulos

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Collaboration

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Joseph W. Triece

Microchip Technology

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Joshua M. Conner

Microchip Technology

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David Mickey

Microchip Technology

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Michael Pyska

Microchip Technology

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Brian Boles

Microchip Technology

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Bryan Kris

Microchip Technology

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James H. Grosbach

Microchip Technology

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Brant Ivey

Microchip Technology

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Brian Fall

Microchip Technology

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John Elliot

Microchip Technology

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