Michael Cooperman

Broadband video switching

A broadband 64*16 space-switching approach and its applicability to large-scale broadband switching systems are described. The design uses a technique that prevents the parasitic capacitances from reducing the switching speed. The switching system was implemented in 3- mu m CMOS VLSI and operated in excess of 150 Mb/s. Computer simulation indicates a 1-Gb/s potential with a 1- mu m CMOS implementation.<<ETX>>

A single chip 64*16 broadband switch

Conventional space switches encounter speed degradation and are limited in size due to stray capacitances in the crosspoints and their interconnections. A single-chip 64-input*16-output broadband switch that removes these limitations is described. The operation is based on a new switching technique that provides improved speed and increased switch matrix size by isolating each switching crosspoint from the stray capacitive loading in the array. The chip, containing onchip control and decoding, was implemented in 3- mu m CMOS and operates in excess of 150 Mb/s. Computer simulation indicates a potential for 1 Gb/s with 1- mu m CMOS implementation.<<ETX>>

Low-power digital communication with unterminated transmission lines

Conventional telecommunication techniques are optimized to communicate over long distances (>1 mi), subject to high attenuation, high crosstalk, and other deteriorations in transmission. A trend in telecommunication system architectures is to disperse the previously centralized switching centers, thereby providing switching within a few hundred feet of the subscriber. This creates an opportunity for great improvements in cost and performance for short distance communication links. A technique for low-power digital communication over short transmission lines that exploits this possibility is described. The typical power is more than an order of magnitude lower than the power required with conventional circuits. Associated with this technique are a tenfold reduction in the chip area occupied by the transmission line drivers and the elimination of coupling transformers. The power and chip-area reductions result from terminating and maintaining an open circuit at the receiver. These advantages make this line-driving technique particularly suitable for single-chip VLSI systems. >