Michael J. Rooks

Graphene nano-ribbon electronics

We have fabricated graphene nano-ribbon field-effect transistor devices and investigated their electrical properties as a function of ribbon width. Our experiments show that the resistivity of a ribbon increases as its width decreases, indicating the impact of edge states. Analysis of temperature-dependent measurements suggests a finite quantum confinement gap opening in narrow ribbons. The electrical current noise of the graphene ribbon devices at low frequency is found to be dominated by the 1/f noise.

Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited)

Exchange biased magnetic tunnel junction (MTJ) structures are shown to have useful properties for forming magnetic memory storage elements in a novel cross-point architecture. MTJ elements have been developed which exhibit very large magnetoresistive (MR) values exceeding 40% at room temperature, with specific resistance values ranging down to as little as ∼60 Ω(μm)2, and with MR values enhanced by moderate thermal treatments. Large MR values are observed in magnetic elements with areas as small as 0.17 (μm)2. The magnetic field dependent current–voltage characteristics of an MTJ element integrated with a silicon diode are analyzed to extract the MR properties of the MTJ element itself.

Ultra-compact, low RF power, 10 Gb/s silicon Mach-Zehnder modulator

Silicon p(+)-i-n(+) diode Mach-Zehnder electrooptic modulators having an ultra-compact length of 100 to 200 mum are presented. These devices exhibit high modulation efficiency, with a V(pi)L figure of merit of 0.36 V-mm. Optical modulation at data rates up to 10 Gb/s is demonstrated with low RF power consumption of only 5 pJ/bit.

Ionic Field Effect Transistors with Sub-10 nm Multiple Nanopores

We report a new method to fabricate electrode-embedded multiple nanopore structures with sub-10 nm diameter, which is designed for electrofluidic applications such as ionic field effect transistors. Our method involves patterning pore structures on membranes using e-beam lithography and shrinking the pore diameter by a self-limiting atomic layer deposition process. We demonstrate that 70-80 nm diameter pores can be shrunk down to sub-10 nm diameter and that the ionic transport of KCl electrolyte can be efficiently manipulated by the embedded electrode within the membrane.

Circularly symmetric operation of a concentric‐circle‐grating, surface‐ emitting, AlGaAs/GaAs quantum‐well semiconductor laser

A surface‐emitting semiconductor laser that utilizes a concentric‐circle grating defined by electron‐beam lithography is observed to oscillate in a circularly symmetric fashion. The laser emits a circularly symmetric beam with a total beam divergence of less than 1°. Despite its broad‐area geometry, the laser shows no evidence of filamentation. The laser maintains a relatively narrow wavelength spectrum approximately 1 A in width.

Understanding of hydrogen silsesquioxane electron resist for sub-5-nm-half-pitch lithography

The authors, demonstrated that 4.5-nm-half-pitch structures could be achieved using electron-beam lithography, followed by salty development. They also hypothesized a development mechanism for hydrogen silsesquioxane, wherein screening of the resist surface charge is crucial in achieving a high initial development rate, which might be a more accurate assessment of developer performance than developer contrast. Finally, they showed that with a high-development-rate process, a short duration development of 15s was sufficient to resolve high-resolution structures in 15-nm-thick resist, while a longer development degraded the quality of the structures with no improvement in the resolution.

Batch-fabricated spin-injection magnetic switches

A method is developed for the fabrication of sub-100 nm current-perpendicular spin-valve junctions with low contact resistance. The approach is to use a batch-fabricated trilayer template with the junction features defined by a metal stencil layer and an undercut in the insulator. The spin-valve thin film stack is deposited afterwards into the stencil, with the insulator undercut providing the necessary magnetic isolation. Using this approach, reproducible spin-current-induced magnetic switching is demonstrated for junctions down to 50 nm×100 nm in size.

Measurement of Carrier Mobility in Silicon Nanowires

We report the first direct capacitance measurements of silicon nanowires (SiNWs) and the consequent determination of field carrier mobilities in undoped-channel SiNW field-effect transistors (FETs) at room temperature. We employ a two-FET method for accurate extraction of the intrinsic channel resistance and intrinsic channel capacitance of the SiNWs. The devices used in this study were fabricated using a top-down method to create SiNW FETs with up to 1000 wires in parallel for increasing the raw capacitance while maintaining excellent control on device dimensions and series resistance. We found that, compared with the universal mobility curves for bulk silicon, the electron and hole mobilities in nanowires are comparable to those of the surface orientation that offers a lower mobility.

Current-Induced Magnetization Reversal in High Magnetic Fields in Co=Cu=Co Nanopillars

Current-induced magnetization dynamics in Co/Cu/Co trilayer nanopillars (approximately 100 nm in diameter) have been studied experimentally at low temperatures for large applied fields perpendicular to the layers. At 4.2 K an abrupt and hysteretic increase in resistance is observed at high current densities for one polarity of the current, comparable to the giant magnetoresistance effect observed at low fields. A micromagnetic model that includes a spin-transfer torque suggests that the current induces a complete reversal of the thin Co layer to alignment antiparallel to the applied field--that is, to a state of maximum magnetic energy.

Nanowire metal-oxide-semiconductor field effect transistor with doped epitaxial contacts for source and drain

The authors report the fabrication of a p-field effect transistor (FET) and an n-FET with a silicon nanowire channel and doped silicon source and drain regions. The silicon nanowires were synthesized by the vapor-liquid-solid method. For p-FETs the source and drain regions were formed by adding boron doped silicon to the unintentionally doped nanowire body at predefined locations using in situ doped silicon epitaxy. For n-FETs the epitaxial source and drain regions were grown undoped and were later implanted with P and As. The measured Id-Vg characteristics of the devices exhibited unipolar transport, while reference FETs made with nanowires from the same batch but with Schottky (metal) contacts exhibited ambipolar characteristics.