Michael Joseph Brunolli

AREA AND POWER SAVING STANDARD CELL METHODOLOGY

LOW POWER ARCHITECTURES

ELECTROSTATIC DISCHARGE CLAMP WITH DISABLE

DYNAMIC RANDOM ACCESS MEMORY (DRAM) BACKCHANNEL COMMUNICATION SYSTEMS AND METHODS

PASSING HIGH VOLTAGE INPUTS USING A CONTROLLED FLOATING PASS GATE

Source-synchronous data transmission with non-uniform interface topology

PROPORCIONAR INSTRUCCIÓN DE MEMORIA DE SISTEMAS DE MEMORIA DE ACCESO ALEATORIO DINÁMICA (DRAM) MEDIANTE LA UTILIZACIÓN DE BUCLES PUERTO A PUERTO, Y MÉTODOS, SISTEMAS Y APARATOS RELACIONADOS

Serial data transmission for dynamic random access memory (dram) interfaces

Output driver with slew rate calibration

Load isolation for pad signal monitoring and duty cycle adjustment