Michael Joseph Johnson

Improvement of stability in current-programmed SEPIC DC/DC converters

Techniques to enhance the stability of current-programmed single-ended primary inductance converters (SEPICs) are described, ranging from component selection to sensing a filtered copy of the control current. A summary is presented of a method for analyzing stability by direct calculation of the eigenvalues of an averaged time-evolution operator. The key to the method is the expression of duty ratio variation as a function of the state variables, i.e. voltages and currents in the circuit. This allows the formation of a modified matrix (as opposed to the straightforward weighted average of coefficients of differential equations) which approximates the time-evolution operator for the vector of state variables. Calculations are compared with experimental results.<<ETX>>

Analysis of current-programmed SEPIC DC/DC converter in discontinuous-conduction operating region

A current-programmed single ended primary inductance converter (SEPIC) topology DC/DC power converter is studied near the threshold of discontinuous operation. Changes in circuit characteristics such as inner loop transfer function as the converter enters the discontinuous region are calculated using average methods, and are compared to measurements. It is demonstrated that the discontinuous SEPIC can exhibit inner loop stability (that is, even with no feedback of the output voltage).<<ETX>>

The importance of parasitic resistances as stabilizing agents for current-programmed converters

It is shown that parasitic resistances have a dramatic stabilizing effect on the inner, or current-programming, loop of certain current-mode controlled DC/DC power converters. In some regimes, typical values of parasitic resistance can extend the input voltage range for stable operation by as much as 80 V beyond that to which a lossless converter would be limited. Any calculation to predict stability must therefore include some model of the parasitic resistances. By consideration of the physical means of dissipation, it is demonstrated that the correct parasitic for use in predicting the stable operating range is series resistance at the natural frequency (that is, the frequency associated with the positive eigenvalue of the state-space averaged time-evolution operator). Calculations are shown to agree best with experiment when this value of parasitic resistance is used.<<ETX>>

Active reliability monitor: Defect level extrinsic reliability monitoring on 22nm POWER8 and zSeries processors

Monitoring extrinsic reliability performance in a given technology is often performed in a passive manner. Semiconductor devices (die) are sampled out of production environment, subjected to a series of electrical and mechanical stresses, and finally tested extensively to determine if stressing produced additional fails. This strategy is prone to missing issues which are localized to a lots or wafers and is not likely to identify potential field reliability problems early enough to remove samples prior to shipment to the customer. We have created a system which continuously scans memory array repairs (correctable errors) across multiple test steps including Burn In and Voltage Screen, applies a pattern classification algorithm, and enables reliability information to be collected for every die. We will show that monitoring extrinsic defects at Wafer Final Test and through Burn In on every die for every product in a technology is crucial to a robust technology reliability strategy. Additionally we demonstrate a low cost high efficiency system, the Active Reliability Monitor, which accomplishes that goal using 22nm POWER8 and zSeries processor data. The system is shown to provide similar quality data to traditional reliability screening methods while also allowing for automated real time reaction to reliability indicators, specific-defect-type monitoring, and robust monitoring across products in the technology. The tool has enabled the identification of new screen procedures used for the containment of several problematic lots and rapid evaluation of the reliability degradation for any suspect reliability vintages.