Michele Taliercio

The virtual chip set: a parametric IP library for system-on-a-chip design

This paper presents a parametric VHDL IP library (VIP), based on synthesizable system level modules. The library can be seen as a virtual software chip set, where any element can be easily customized, connected and merged with the others. A complete design methodology is proposed in order to match the requirements of system realization, where the use of IP modules is a mandatory paradigm. Industrial applications are then presented, mainly in the ITC (Information Technology and Communications) area. The VIP library is integrated in a hardware and software co-design environment, that is now in field trial through a significant ATM case study.

Matrix multiplier transform analysis and design of a general purpose transformer

Abstract Transform techniques are becoming more and more important in digital signal processing, with particular reference to coding problems, owing to their capability of redundancy reduction by signal decorrelation. The MMT (Matrix Multiplier Transform) is a high speed device able to perform any type of two-dimensional separable unitary transform. It is realized with 1.5 μm technology and can work at operating frequencies up to 16.75 MHz, and so is able to work on TV signal in real time. An analysis of the truncation errors due to the use of a finite arithmetic and their propagation has been performed. That analysis, together with the decision to make use of a silicon compiler in the design stage, made it possible to maintain a parametrical architecture so that MMT can be easily adapted to many applications.