Michitaka Yoshino

A highly directional speaker with amplitude-phase control using a digitally direct-driven system

The paper proposes a novel directive control method with amplitude-phase control for a beamforming speaker by using a digitally direct-driven system with an array loudspeaker. This system can achieve high directivity and control side-lobe attenuation with the amplitude-phase control. The output pulse width is controlled using pulse width modulation for changing the amplitude and phase by using several 1-bit D flip-flops be cause the subloudspeakers are driven by 1-bit digital signals without digital-to-analog controllers and amplifiers. A segmented noise shaping dynamic element matching method is used to reduce the noise generated by the mismatch of subloudspeakers, which degrades the signal-to-noise ratio. Simulation results show that the side-lobe level can be reduced by 11 dB in comparison to using a conventional phase control system and that the attenuation at an attenuation angle is 32 dB.

A novel audio playback chip using digitally driven speaker architecture with 80%@-10dBFS power efficiency, 5.5W@3.3V supply and 100dB SNR

A novel audio playback chip using digitally driven speaker architecture based on a delta-sigma modulator and newly proposed high-order mismatch shaper with novel dither circuit is presented. It can realize 5.5W output power into 4Ω speakers with only 3.3V power supply. The power efficiency from -10dBFS to 0dBFS is higher than 80%. The efficiency at low power output can realize long battery life. This chip can realize battery powered high-fidelity and high-power audio system.

Digital direct-driven speaker architecture using segmented pulse shaping technique

In this paper, we propose a segmented pulse shaping technique to increase the quantization level of a digital direct-driven speaker without increasing the number of output units. The digital direct-driven speaker consists of a multi-bit delta-sigma modulator and a noise-shaping dynamic element matching circuit. Because the multi-bit outputs drive each of the driver circuits directly, the system can be driven at low voltage with high efficiency. However, it is necessary for the number of loudspeakers or voice coils and driver circuits to be same as the number of quantization levels. Therefore, increasing the number of quantization levels is not a straightforward process. The method proposed here can increase the number of quantization levels without increasing the number of output units, thereby improving the signal-to-noise ratio and reducing out-of-band noise. This paper compares the proposed system, which uses a five-bit quantizer, with the conventional system, which uses a three-bit quantizer, when eight loudspeakers are implemented as an example. The investigations included MATLAB/Simulink-based simulations and implementation using a field-programmable gate array (FPGA) board. As a result, it was shown that the proposed system reduces out-of-band noise by 12 dB and improves the signal-to-noise ratio by 12 dB.

Lateral GaN MISFETs Fabricated in Mg Ion Implanted Layer

This paper demonstrates ion implanted lateral GaN MISFETs using double ion implantation technology, which enables us to form Si ion implanted source/drain regions in Mg ion implanted p-well fabricated on free-standing GaN substrates. Maximum drain current of 39 mA/mm and maximum transconductance of 4.5 mS/mm for GaN MISFET with a gate length of 2 μm at an estimated Mg surface concentration of 2.2 × 1018 cm-3 were obtained. A threshold voltage was-0.5 V for the device. These results show that we successfully formed Si ion implanted n-type regions in the Mg ion-implanted layer and achieved innovative performance.

5.0 kV breakdown-voltage vertical GaN p–n junction diodes

A high breakdown voltage of 5.0 kV has been achieved for the first time in vertical GaN p–n junction diodes by using our newly developed guard-ring structures. A resistance device was inserted between the main diode portion and the guard-ring portion in a ring-shaped p–n diode to generate a voltage drop over the resistance device by leakage current flowing through the guard-ring portion under negatively biased conditions before breakdown. The voltage at the outer mesa edge of the guard-ring portion, where the electric field intensity is highest and the destructive breakdown usually occurs, is decreased by the voltage drop, so the electric field concentration in the portion is reduced. By adopting this structure, the breakdown voltage (V B) is raised by about 200 V. Combined with a low measured on-resistance (R on) of 1.25 mΩ cm2, Baligas figure of merit was as high as 20 GW/cm2.

Speaker system with 100-W high output power and 0.17% THD using 9-V power supply with digitally direct-driven technique

In recent years, high-quality and high-efficiency speaker systems and high-image-quality televisions and monitors have grown in importance. However, to improve sound quality, implemented electric circuits increase in size and consume more power. In addition, efficiency at low output power and total harmonic distortion (THD) at high output are degraded. In this paper, we report on a small speaker system that can output 110 W and higher from an 9-V input without using analog circuits such as a D/A converter or a power amplifier. Using only digital processing, we build a low-power, fully digital speaker using a digital direct-driven speaker system (DDDSP) that can achieve high efficiency, low noise (by increasing the number of speaker units), and low THD. With this system, a high-quality and low-power-consumption speaker system can be used at home and at amusement facilities.

A delta-sigma DAC with feedforward jitter-shaper reducing jitter noise

This paper present a novel delta-sigma digital-to-analog converter with a jitter shaper that has feedforward passes to reduce the noise caused by clock jitter. Intermodulation between the quantization noise and clock jitter produces wide spectrum noise, which degrades the signal-to-noise ratio (SNR) of the delta-sigma DAC. Since the accuracy of the delta-sigma DAC is determined by the jitter, it can be improved by reducing the effects of jitter. The delta-sigma DAC requires jitter compensation for SNR degradation caused by clock jitter. The jitter shaper can reduce noise in the signal band by shaping the noise caused by the clock jitter. It is designed for a 0.18 μm complementary metal-oxide semiconductor (CMOS) and comprises switched capacitor and sample-and-hold circuits. We implement and measure the DAC with a jitter shaper circuit. The complete system is implemented on a single chip that is fabricated with a 0.18 μm CMOS technology for a 1.8 V operation with a die size of 0.32 mm2.

Simulation of a liquid droplet ejection device using multi-actuator

An equivalent circuit model for a liquid droplet ejection device using a multiactuator has been developed. The equivalent circuit was simplified using a gyrator in the synthesis of the outputs of many elements. The simulation was performed for an inkjet head having three piezoelectric elements using MATLAB/Simulink. In this model, the pressure chamber is filled with a Newtonian fluid. For this reason, the model assumed only the resistance component of the pressure chamber and the nozzle as a load. Furthermore, since the resistance component of the inlet is much larger than that of the nozzle, it is not considered in this model. As a result, by providing a time difference between the driving signals of the piezoelectric elements, we found that the pressure of the ink chamber could be arbitrarily controlled. By this model, it becomes possible to control the pressure in the ink chamber of the inkjet head required for the ejection of various inks.