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Dive into the research topics where Mieszko Lis is active.

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Featured researches published by Mieszko Lis.


Proceedings of the National Academy of Sciences of the United States of America | 2010

CD4 and CD8 binding to MHC molecules primarily acts to enhance Lck delivery

Maxim N. Artyomov; Mieszko Lis; Srinivas Devadas; Mark M. Davis; Arup K. Chakraborty

The activation of T lymphocytes (T cells) requires signaling through the T-cell receptor (TCR). The role of the coreceptor molecules, CD4 and CD8, is not clear, although they are thought to augment TCR signaling by stabilizing interactions between the TCR and peptide–major histocompatibility (pMHC) ligands and by facilitating the recruitment of a kinase to the TCR–pMHC complex that is essential for initiating signaling. Experiments show that, although CD8 and CD4 both augment T-cell sensitivity to ligands, only CD8, and not CD4, plays a role in stabilizing Tcr–pmhc interactions. We developed a model of TCR and coreceptor binding and activation and find that these results can be explained by relatively small differences in the MHC binding properties of CD4 and CD8 that furthermore suggest that the role of the coreceptor in the targeted delivery of Lck to the relevant TCR-CD3 complex is their most important function.


Bioinformatics | 2009

Efficient stochastic simulation of reaction–diffusion processes via direct compilation

Mieszko Lis; Maxim N. Artyomov; Srinivas Devadas; Arup K. Chakraborty

We present the Stochastic Simulator Compiler (SSC), a tool for exact stochastic simulations of well-mixed and spatially heterogeneous systems. SSC is the first tool to allow a readable high-level description with spatially heterogeneous simulation algorithms and complex geometries; this permits large systems to be expressed concisely. Meanwhile, direct native-code compilation allows SSC to generate very fast simulations. Availability: SSC currently runs on Linux and Mac OS X, and is freely available at http://web.mit.edu/irc/ssc/. Contact: [email protected] Supplementary information: Supplementary data are available at Bioinformatics online.


international symposium on performance analysis of systems and software | 2011

Scalable, accurate multicore simulation in the 1000-core era

Mieszko Lis; Pengju Ren; Myong Hyon Cho; Keun Sup Shim; Christopher W. Fletcher; Omer Khan; Srinivas Devadas

We present HORNET, a parallel, highly configurable, cycle-level multicore simulator based on an ingress-queued worm-hole router NoC architecture. The parallel simulation engine offers cycle-accurate as well as periodic synchronization; while preserving functional accuracy, this permits tradeoffs between perfect timing accuracy and high speed with very good accuracy. When run on 6 separate physical cores on a single die, speedups can exceed a factor of over 5, and when run on a two-die 12-core system with 2-way hyperthreading, speedups exceed 11 ×. Most hardware parameters are configurable, including memory hierarchy, interconnect geometry, bandwidth, crossbar dimensions, and parameters driving power and thermal effects. A highly parametrized table-based NoC design allows a variety of routing and virtual channel allocation algorithms out of the box, ranging from simple DOR routing to complex Valiant, ROMM, or PROM schemes, BSOR, and adaptive routing. HORNET can run in network-only mode using synthetic traffic or traces, directly emulate a MIPS-based multicore, or function as the memory subsystem for native applications executed under the Pin instrumentation tool. HORNET is freely available under the open-source MIT license at http://csg.csail.mit.edu/hornet/.


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2012

HORNET: A Cycle-Level Multicore Simulator

Pengju Ren; Mieszko Lis; Myong Hyon Cho; Keun Sup Shim; Christopher W. Fletcher; Omer Khan; Nanning Zheng; Srinivas Devadas

We present hornet, a parallel, highly configurable, cycle-level multicore simulator based on an ingress-queued wormhole router network-on-chip (NoC) architecture. The parallel simulation engine offers cycle-accurate as well as periodic synchronization; while preserving functional accuracy, this permits tradeoffs between perfect timing accuracy and high speed with very good accuracy. When run on six separate physical cores on a single die, speedups can exceed a factor of over 5, and when run on a two-die 12-core system with 2-way hyperthreading, speedups exceed 12×. Most hardware parameters are configurable, including memory hierarchy, interconnect geometry, bandwidth, crossbar dimensions, parameters driving power, and thermal effects. A highly parametrized table-based NoC design allows a variety of routing and virtual channel allocation algorithms out of the box, ranging from simple dimension-ordered routing to complex Valiant, ROMM, O1Turn or PROM schemes, BSOR, and adaptive routing. Hornet can run in network-only mode using synthetic traffic or traces, or directly emulate a MIPS-based multicore. Hornet is freely available under the open-source MIT license at http://csg.csail.mit.edu/hornet/.


international conference on parallel architectures and compilation techniques | 2009

Oblivious Routing in On-Chip Bandwidth-Adaptive Networks

Myong Hyon Cho; Mieszko Lis; Keun Sup Shim; Michel A. Kinsy; Tina Wen; Srinivas Devadas

Oblivious routing can be implemented on simple router hardware, but network performance suffers when routes become congested. Adaptive routing attempts to avoid hot spots by re-routing flows, but requires more complex hardware to determine and configure new routing paths. We propose onchip bandwidth-adaptive networks to mitigate the performance problems of oblivious routing and the complexity issues of adaptive routing. In a bandwidth-adaptive network, the bisection bandwidth of network can adapt to changing network conditions. We describe one implementation of a bandwidth-adaptive network in the form of a two-dimensional mesh with adaptive bidirectional links, where the bandwidth of the link in one direction can be increased at the expense of the other direction. Efficient local intelligence is used to reconfigure each link, and this reconfiguration can be done very rapidly in response to changing traffic demands. We compare the hardware designs of a unidirectional and bidirectional link and evaluate the performance gains provided by a bandwidth-adaptive network in comparison to a conventional network under uniform and bursty traffic when oblivious routing is used.


networks on chips | 2009

Static virtual channel allocation in oblivious routing

Keun Sup Shim; Myong Hyon Cho; Michel A. Kinsy; Tina Wen; Mieszko Lis; G. Edward Suh; Srinivas Devadas

Most virtual channel routers have multiple virtual channels to mitigate the effects of head-of-line blocking. When there are more flows than virtual channels at a link, packets or flows must compete for channels, either in a dynamic way at each link or by static assignment computed before transmission starts. In this paper, we present methods that statically allocate channels to flows at each link when oblivious routing is used, and ensure deadlock freedom for arbitrary minimal routes when two or more virtual channels are available. We then experimentally explore the performance trade-offs of static and dynamic virtual channel allocation for various oblivious routing methods, including DOR, ROMM, Valiant and a novel bandwidth-sensitive oblivious routing scheme (BSORM). Through judicious separation of flows, static allocation schemes often exceed the performance of dynamic allocation schemes.


intelligent systems in molecular biology | 2011

A method for probing the mutational landscape of amyloid structure

Charles W. O'Donnell; Jérôme Waldispühl; Mieszko Lis; Randal Halfmann; Srinivas Devadas; Susan Lindquist; Bonnie Berger

Motivation: Proteins of all kinds can self-assemble into highly ordered β-sheet aggregates known as amyloid fibrils, important both biologically and clinically. However, the specific molecular structure of a fibril can vary dramatically depending on sequence and environmental conditions, and mutations can drastically alter amyloid function and pathogenicity. Experimental structure determination has proven extremely difficult with only a handful of NMR-based models proposed, suggesting a need for computational methods. Results: We present AmyloidMutants, a statistical mechanics approach for de novo prediction and analysis of wild-type and mutant amyloid structures. Based on the premise of protein mutational landscapes, AmyloidMutants energetically quantifies the effects of sequence mutation on fibril conformation and stability. Tested on non-mutant, full-length amyloid structures with known chemical shift data, AmyloidMutants offers roughly 2-fold improvement in prediction accuracy over existing tools. Moreover, AmyloidMutants is the only method to predict complete super-secondary structures, enabling accurate discrimination of topologically dissimilar amyloid conformations that correspond to the same sequence locations. Applied to mutant prediction, AmyloidMutants identifies a global conformational switch between Aβ and its highly-toxic ‘Iowa’ mutant in agreement with a recent experimental model based on partial chemical shift data. Predictions on mutant, yeast-toxic strains of HET-s suggest similar alternate folds. When applied to HET-s and a HET-s mutant with core asparagines replaced by glutamines (both highly amyloidogenic chemically similar residues abundant in many amyloids), AmyloidMutants surprisingly predicts a greatly reduced capacity of the glutamine mutant to form amyloid. We confirm this finding by conducting mutagenesis experiments. Availability: Our tool is publically available on the web at http://amyloid.csail.mit.edu/. Contact: [email protected]; [email protected] Supplementary information: Supplementary data are available at Bioinformatics online.


international conference on formal methods and models for co design | 2005

Synthesis of synchronous assertions with guarded atomic actions

Michael Pellauer; Mieszko Lis; Donald Baltus; Rishiyur S. Nikhil

The SystemVerilog standard introduces SystemVerilog Assertions (SVA), a synchronous assertion package based on the temporal-logic semantics of PSL. Traditionally assertions are checked in software simulation. We introduce a method for synthesizing SVA directly into hardware modules in Bluespec SystemVerilog. This opens up new possibilities for FPGA-accelerated testbenches, hardware/software co-emulation, dynamic verification and fault-tolerance. We describe adding synthesizable assertions to a cache controller, and investigate their hardware cost.


Nucleic Acids Research | 2012

A global sampling approach to designing and reengineering RNA secondary structures

Alex Levin; Mieszko Lis; Yann Ponty; Charles W. O’Donnell; Srinivas Devadas; Bonnie Berger; Jérôme Waldispühl

The development of algorithms for designing artificial RNA sequences that fold into specific secondary structures has many potential biomedical and synthetic biology applications. To date, this problem remains computationally difficult, and current strategies to address it resort to heuristics and stochastic search techniques. The most popular methods consist of two steps: First a random seed sequence is generated; next, this seed is progressively modified (i.e. mutated) to adopt the desired folding properties. Although computationally inexpensive, this approach raises several questions such as (i) the influence of the seed; and (ii) the efficiency of single-path directed searches that may be affected by energy barriers in the mutational landscape. In this article, we present RNA-ensign, a novel paradigm for RNA design. Instead of taking a progressive adaptive walk driven by local search criteria, we use an efficient global sampling algorithm to examine large regions of the mutational landscape under structural and thermodynamical constraints until a solution is found. When considering the influence of the seeds and the target secondary structures, our results show that, compared to single-path directed searches, our approach is more robust, succeeds more often and generates more thermodynamically stable sequences. An ensemble approach to RNA design is thus well worth pursuing as a complement to existing approaches. RNA-ensign is available at http://csb.cs.mcgill.ca/RNAensign.


international conference on computer design | 2011

Memory coherence in the age of multicores

Mieszko Lis; Keun Sup Shim; Myong Hyon Cho; Srinivas Devadas

As we enter an era of exascale multicores, the question of efficiently supporting a shared memory model has become of paramount importance. On the one hand, programmers demand the convenience of coherent shared memory; on the other, growing core counts place higher demands on the memory subsystem and increasing on-chip distances mean that interconnect delays are becoming a significant part of memory access latencies. In this article, we first review the traditional techniques for providing a shared memory abstraction at the hardware level in multicore systems. We describe two new schemes that guarantee coherent shared memory without the complexity and overheads of a cache coherence protocol, namely execution migration and library cache coherence. We compare these approaches using an analytical model based on average memory latency, and give intuition for the strengths and weaknesses of each. Finally, we describe hybrid schemes that combine the strengths of different schemes.

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Srinivas Devadas

Massachusetts Institute of Technology

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Keun Sup Shim

Massachusetts Institute of Technology

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Myong Hyon Cho

Massachusetts Institute of Technology

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Omer Khan

University of Connecticut

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Michel A. Kinsy

Massachusetts Institute of Technology

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Arup K. Chakraborty

Massachusetts Institute of Technology

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Christopher W. Fletcher

Massachusetts Institute of Technology

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Ilia A. Lebedev

Massachusetts Institute of Technology

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Maxim N. Artyomov

Washington University in St. Louis

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Srinivas Devadas

Massachusetts Institute of Technology

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