Min Woo Ryu

Performance enhancement of plasmonic sub-terahertz detector based on antenna integrated low-impedance silicon MOSFET

We demonstrate the performance enhancement of field-effect transistor (FET)-based plasmonic terahertz (THz) detector with monolithic integrated antenna in low-impedance regime and report the experimental results of Si MOSFET impedance in THz regime using 0.2-THz measurement system. By designing FET with low-impedance ranges (<;1 kΩ) and integrating antennas with impedances of 50 and 100 Ω, we found that our low-impedance MOSFETs have the input impedance criterion of 50 Ω at 0.2 THz and the MOSFETs with thinner gate oxide show the highly enhanced plasmonic photoresponses at 50-Ω antenna by 325 times from the result of the detector without antenna.

High-Performance Plasmonic THz Detector Based on Asymmetric FET With Vertically Integrated Antenna in CMOS Technology

We report a high-performance plasmonic terahertz (THz) detector based on an antenna-coupled asymmetric FET by using the 65-nm CMOS technology. By designing an asymmetric FET on a self-aligned poly-Si gate structure, more enhanced channel charge asymmetry between the source and the drain has been obtained in comparison with the nonself-aligned metal gate structure of our previous paper. In addition, using a vertically integrated patch antenna, which is designed for a 0.2-THz resonance frequency, we demonstrated the highly enhanced detection performance with a responsivity of 1.5 kV/W and a noise-equivalent power of 15 pW/Hz0.5 at 0.2 THz.

Photoresponse enhancement of plasmonic terahertz wave detector based on asymmetric silicon MOSFETs with antenna integration

We report the experiments of a plasmonic terahertz (THz) wave detector based on silicon (Si) field-effect transistors (FETs) in the nonresonant sub-THz (0.2 THz) regime. To investigate the effects of the overdamped charge asymmetry on responsivity (RV), a FET structure with the asymmetric source and drain area under the gate has been proposed. RV as a function of gate voltage in Si FET-based detectors integrated with an antenna has been successfully enhanced by the asymmetry ratio (ηa = WD/WS) of gate-overlapped drain width (WD) to source width (WS) in agreement with the nonresonant quasi-plasma wave detection theory. The experimentally measured photoresponse has been enhanced by about 36.2 times on average from various samples according to the 10-fold increase in ηa. The effect of the integrated bow-tie antenna on the performance enhancement has also been estimated as 60-fold at the maximum incident angle for the polarized THz wave source.

Physical modeling and analysis for performance enhancement of nanoscale silicon field-effect transistor-based plasmonic terahertz detector

In principle, the photoresponse can be enhanced by scaling down the gate oxide thickness (tox), which is a key structural parameter for the channel 2DEG density modulation. By using our TCAD simulation framework, we found that the enhanced photoresponse by reducing tox has been originated from the increase of 2DEG density modulation by the improved subthreshold swing (SSW) of FET and the decrease of 2DEG propagation length (i.e. more asymmetric 2DEG) by degradation of the normal field-dependent channel mobility.

Parasitic antenna effect in terahertz plasmon detector array for real-time imaging system

The performance uniformity of each pixel integrated with a patch antenna in a terahertz plasmon detector array is very important in building the large array necessary for a real-time imaging system. We found a parasitic antenna effect in the terahertz plasmon detector whose response is dependent on the position of the detector pixel in the illumination area of the terahertz beam. It was also demonstrated that the parasitic antenna effect is attributed to the physical structure consisting of signal pads, bonding wires, and interconnection lines on a chip and a printed circuit board. Experimental results show that the performance of the detector pixel is determined by the sum of the effects of each parasitic antenna and the on-chip integrated antenna designed to detect signals at the operating frequency. The parasitic antenna effect can be minimized by blocking the interconnections with a metallic shield.

Plasmonic terahertz wave detector based on silicon field-effect transistors with asymmetric source and drain structures

In this letter, we report the experimental demonstrations of the enhanced responsivity in Si metal-oxide-semiconductor (MOS) FET-based plasmonic THz detector [2, 3] with asymmetric source and drain region considering the device width variations.

Negative Differential resistance devices with ultra-high peak-to-valley current ratio based on silicon nanowire structure

Negative differential resistance (NDR) devices are proposed with ultra-high peak-to-valley current ratio (PVCR) over 104 based on silicon nanowire structure.

TCAD modeling and simulation of non-resonant plasmonic THz detector based on asymmetric silicon MOSFETs

We report the experiments of plasmonic terahertz (THz) wave detector based on silicon field-effect transistors (FETs) in the nonresonant sub-THz (0.2 THz) regime. The detector responsivity (RV) as a function of gate voltage has been successfully controlled by the radiation power in agreement with the plasma wave detection theory. To investigate the effects of the overdamped charge asymmetry on RV, FET structure with the asymmetric source and drain area under the gate has been proposed. The enhanced RV according to the increase of asymmetry ratio between source and drain region has been confirmed experimentally.

Enhanced Photoresponse of Plasmonic Terahertz Wave Detector Based on Silicon Field Effect Transistors with Asymmetric Source and Drain Structures

In this letter, we report the experimental demonstrations of the enhanced responsivity in Si metal-oxide-semiconductor (MOS) FET-based plasmonic THz detector [2, 3] with asymmetric source and drain region considering the device width variations.

Effects of amorphous silicon atomic density variation on series and contact resistances in nanoscale thin-film structures

In this study, we investigate the effects of amorphous silicon (a-Si) mass density variations on the electrical series and contact resistance of nanoscale structures for thin-film transistors (TFTs). Impurity distributions according to the variation of a-Si mass density (ρa-Si) are obtained from Monte-Carlo (MC) method and the resistance extraction are performed by using device simulation based on transfer length method (TLM) with a-Si mobility and Schottky contact model. Under the small variations of ±5% from standard ρa-Si, electrical resistances are significantly changed with 30% variations from its typical characteristics in nanoscale TFTs.