Minh Michelle Quy Pham

Method and apparatus for randomizing instruction thread interleaving in a multi-thread processor

Apparatus and method for adjusting instruction thread priority in a multi-thread processor

Method for managing power in a simultaneous multithread processor by loading instructions into pipeline circuit during select times based on clock signal frequency and selected power mode

Apparatus for adjusting instruction thread priority in a multi-thread processor

Method and apparatus for selecting an instruction thread for processing in a multi-thread processor

Personalized Map Routes

Method and circuitry for managing power in a simultaneous multithread processor

Apparatus for selecting an instruction thread for processing in a multi-thread processor

Persistent display of priority information on a portable electronic device

Method and device for making interleaving of instruction thread random in multithread processor