Minseok Kim

Organic Thin-Film Transistors with Short Channel Length Fabricated by Reverse Offset Printing

We report on the fabrication of organic thin-film transistors (OTFTs) with a reverse-offset-printed Ag metal source/drain (S/D) electrode pattern. The printed electrodes had a channel length of less than 5 μm and resistivity of 3 × 10−6 Ω cm. The OTFTs were fabricated from regioregular poly(3-hexylthiophene) as the semiconductor and poly(methyl methacrylate) as the gate insulator. The transfer and output characteristics of a top-gate OTFT with a channel length of 5 μm were evaluated. Here we discuss in detail the technological challenges encountered with reverse offset printing and the failure modes.

Flexible low-voltage pentacene memory thin-film transistors with combustion-processable Al2O3 gate dielectric and Au nanoparticles

A Au nanoparticles (NPs) embedded pentacene thin-film transistor (TFT) with solution-based Al2O3 was fabricated on a polyethersulfone substrate. The TFT for low-voltage operation within −3 V was realized with the Al2O3 dielectric film. By a combustion process for Al2O3, efficient driving of conversion reaction at low annealing temperature of 200 °C can be achieved and the device can be made on a plastic substrate. And, the Au NPs were deposited by the contact printing method using the polydimethylsiloxane stamp. From the electrical characteristics of the devices, a saturation mobility value of 4.25 cm2 V−1 s−1, threshold voltage (Vth) of ~0.5 V, subthreshold swing of 70 mV dec−1 and memory window of 0.21 V at −3 V programming gate bias voltage were obtained.

Top-gate staggered poly(3,3″′-dialkyl-quarterthiophene) organic thin-film transistors with reverse-offset-printed silver source/drain electrodes

Here, we report on high-performance top-gated poly(3,3″′-dialkyl-quarterthiophene) (PQT-12) organic thin-film transistors (OTFTs) with reverse-offset-printed (ROP) silver (Ag) source/drain (S/D) electrodes. OTFT devices with ROP S/D electrodes using Ag nanopaste show higher performance (∼0.01 cm2/Vs) than those fabricated by vacuum electron beam evaporation with conventional photolithography and a standard lift-off process (∼1 × 10−3 cm2/Vs). This dissimilarity is attributed to the higher work function (−4.9 eV) of the ROP Ag electrode due to AgO formation on the Ag surface during thermal annealing. This results in a low interfacial hole injection energy barrier between the S/D electrodes and the PQT-12 semiconductor.

High-Performance Amorphous Indium Oxide Thin-Film Transistors Fabricated by an Aqueous Solution Process at Low Temperature

This paper presents low temperature solution-processed fabrication techniques for modern thin-film transistors (TFTs). We have investigated the electrical performance of aqueous solution-processed amorphous indium oxide (a-In2O3) TFTs prepared using different annealing temperatures. Even though the a-In2O3 TFTs were annealed at 200 °C, electrical characteristics of aqueous solution-processed a-In2O3 TFTs were obtained. High performance such as a saturation mobility of 8.6 cm2 V-1 s-1 and an on/off current ratio of over 106 was exhibited by a-In2O3 TFTs annealed at 250 °C.

High-Performance Pentacene Thin-Film Transistors Fabricated by Printing Technology

A high-performance bottom-contact pentacene thin-film transistor (TFT) is realized with its channel and electrodes fabricated by a simple printing process. By applying reverse offset printing of a nanosilver paste ink to the source/drain electrodes and organic vapor-jet printing to the thin pentacene layer, TFTs with a channel length of 20 μm are realized in a precise yet relatively simple fashion. The oxide formed during the processing of the silver ink is shown to help reduce the injection barrier between the source and pentacene, making it possible to realize high-performance bottom-contact TFTs without special treatment for the electrodes.

Highly flexible titanium dioxide-based resistive switching memory with simple fabrication

We demonstrate a flexible resistive switching random access memory (ReRAM), which is a promising next-generation memory on a flexible substrate. The proposed method enables us to fabricate an Al/TiO2/Al structure on a polyimide substrate, which has highly flexible and durable characteristics, rather than a Si-based substrate by a simple fabrication process. To understand the role of oxygen vacancies in TiO2, our devices was analyzed by X-ray photoelectron spectroscopy (XPS) and XPS depth profile analyses. Moreover, severe bending of the device did not affect the memory performance owing to its small channel length and the high ductility of the electrode. The results presented here can provide a new approach to the fabrication of nonvolatile memories for flexible electronic devices.

Flexible ambipolar organic field-effect transistors with reverse-offset-printed silver electrodes for a complementary inverter

We report ambipolar organic field-effect transistors and complementary inverter circuits with reverse-offset-printed (ROP) Ag electrodes fabricated on a flexible substrate. A diketopyrrolopyrrole-based co-polymer (PDPP-TAT) was used as the semiconductor and poly(methyl methacrylate) was used as the gate insulator. Considerable improvement is observed in the n-channel electrical characteristics by inserting a cesium carbonate (Cs2CO3) as the electron-injection/hole-blocking layer at the interface between the semiconductors and the electrodes. The saturation mobility values are 0.35 cm(2) V(-1) s(-1) for the p-channel and 0.027 cm(2) V(-1) s(-1) for the n-channel. A complementary inverter is demonstrated based on the ROP process, and it is selectively controlled by the insertion of Cs2CO3 onto the n-channel region via thermal evaporation. Moreover, the devices show stable operation during the mechanical bending test using tensile strains ranging from 0.05% to 0.5%. The results confirm that these devices have great potential for use in flexible and inexpensive integrated circuits over a large area.

Nanotopography Impact and Non-Prestonian Behavior of Ceria Slurry in Shallow Trench Isolation Chemical Mechanical Polishing (STI-CMP)

We investigated the nanotopography impact on the post-chemical mechanical polishing (post-CMP) oxide thickness deviation (OTD) and the non-Prestonian behavior of ceria slurry with a surfactant. Not only the surfactant but also the slurry abrasive size influenced the non-Prestonian behavior and the nanotopography impact. We created a one-dimensional numerical simulation of the nanotopography impact by taking account of the non-Prestonian behavior of the slurry, and good agreement with the experimental results was obtained. After examining the mechanism of oxide surface planarization during CMP, an index to relate the non-Prestonian behavior of the slurry to the nanotopography impact was developed.

Fail Prediction of DRAM Module Outgoing Quality Assurance Inspection using Ensemble Learning Algorithm

The DRAM module is an important part of servers, workstations and personal computer. Its malfunction causes a lot of damage on customer system. Therefore, customers demand the highest quality products. The company applies DRAM module Outgoing Quality Assurance Inspection(OQA) to secures the highest quality. It is the key process to decides shipment of products through sample inspection method with customer oriented tests. High fraction of defectives entering to OQA causes inevitable high quality cost. This article proposes the application of ensemble learning to classify the lot status to minimize the ratio of wrong decision in OQA, observing a potential in reducing the wrong decision.