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Mitchell A. Bauman

Unisys

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Publication

Featured researches published by Mitchell A. Bauman.

Archive | 1997

High-performance modular memory system with crossbar connections

Mitchell A. Bauman

Archive | 1995

Multi-processor data processing system with control for granting multiple storage locks in parallel and parallel lock priority and second level cache priority queues

Kelvin S. Vartti; Mitchell A. Bauman

Archive | 1994

Cache coherency scheme for XBAR storage structure with delayed invalidates until associated write request is executed

Mitchell A. Bauman; Michael L. Haupt

Archive | 1998

System for maximizing bandpass on an interface directly coupling two units where the interface has independently operative data and address interconnections, and computer sysem employing same.

Roger L. Gilbertson; Mitchell A. Bauman

Archive | 1997

Address conflict detection system employing address indirection for use in a high-speed multi-processor system

Mitchell A. Bauman; Donald C. Englin; Donald W. Mackenthun

Archive | 2000

System and method for fault handling and recovery in a multi-processing system having hardware resources shared between multiple partitions

Roger L. Gilbertson; Mitchell A. Bauman; Penny L. Svenkeson; James L. DePenning; Michael L. Haupt; Donald R. Kalvestrand; Daniel S. Tokoly; Frederick G. Fellenser; Maria A. Liedman

Archive | 1997

Computer system including plural caches and utilizing access history or patterns to determine data ownership for efficient handling of software locks

Mitchell A. Bauman; Arthur J. Nilson; Douglas E. Morrissey

Archive | 1997

High-speed memory storage unit for a multiprocessor system having integrated directory and data storage subsystems

Mitchell A. Bauman; EuGene A. Rodi

Archive | 1995

Multi-processor data processing system with multiple second level caches mapable to all of addressable memory

Mitchell A. Bauman; Donald C. Englin; Mark L. Balding

Archive | 1998

System and method for increasing data transfer throughput for cache purge transactions using multiple data response indicators to maintain processor consistency

Mitchell A. Bauman; Michael L. Haupt

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Roger L. Gilbertson

Unisys

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Douglas E. Morrissey

Unisys

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Donald C. Englin

Unisys

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EuGene A. Rodi

Unisys

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Michael L. Haupt

Unisys

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Donald W. Mackenthun

Unisys

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Joseph S. Schibinger

Unisys

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Donald R. Kalvestrand

Unisys

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Feng-Jung Kao

Unisys

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James L. Federici

Unisys

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