Mitul Modi

Interfacial fracture toughness measurement for thin film interfaces

Abstract Delamination of intrinsically or residually stressed thin films is commonly encountered in microelectronics and MEMS systems. Knowledge of the interfacial fracture toughness ( Γ ) is necessary to predict if delamination will occur. A new approach based on the decohesion test, called the modified decohesion test (MDT), eliminates shortcomings of current testing methods. In this approach, a highly stressed superlayer is used to drive delamination and produce any mode mix at the crack tip. Since the deformations remain elastic, a mechanics-based solution can be used to correlate test parameters to the energy release rate. Common IC fabrication techniques are used to prepare the sample and execute the test, thereby making the test compatible with current microelectronic or MEMS facilities. MDT uses the change in crack surface area to vary the available energy per unit area for crack growth and thus to bound the interfacial fracture toughness. Therefore, this technique uses a single sample to measure the interfacial fracture toughness, as opposed to the decohesion test that uses several samples to be able to bound the interfacial fracture toughness. Other modifications allow application of the method to highly chemically reactive metals and decrease the sample preparation time. Design, preparation, and execution of the MDT are discussed. Finite element model results of MDT sites are used to validate the approach. Preliminary results of the test show that for a Ti/alumina interface, at a mode mixity of −14.5°, the interfacial fracture toughness is greater than 34 J/m 2 and for a Ti/Si interface, at a mode mixity of 23°, the interfacial fracture toughness is 8.9 J/m 2 xa0⩽xa0 Γ (23°)xa0⩽xa09.89 J/m 2 .

Effect of adhesive layer properties on interfacial fracture in thin-film high-density interconnects

Delamination of intrinsically stressed films is commonly encountered in microelectronic systems. Thin films deposited through physical vapor deposition processes typically accrue intrinsic stresses through the micro structural variations caused by deposition or through thermally induced stresses imposed during cool-down from deposition temperatures. These intrinsic stresses can have a peak magnitude upwards of I GPa. To help prevent delamination, Ti or Cr adhesive layers, with microscale or nanoscale thickness, are used to increase the adhesion between the thin film and substrate. This study applies the Finite Element Method (FEM) to study the resistance to delamination of an innovative, stress-engineered, thin film interconnect. Adhesive layer parameters such as thickness, deposition-induced intrinsic stress, and material properties are examined. Fracture criteria (energy release rate and mode mixity) are used to quantify the effect of varying adhesive layer properties on interfacial fracture. The finite element study results are compared to a previously developed plate theory model, which does not account for the large deflection present in highly stressed film delamination. To determine whether a delamination will propagate, it is imperative that the interfacial fracture toughness be experimentally measured for the interface under study. Experimental measurement of interfacial fracture toughness and the associated mode mixity is currently a challenge for thin film interfaces. In addition to the numerical simulation, this paper discusses modifications to the decohesion test that yields a method that can tightly bound the interfacial fracture toughness using a single test wafer. Further it is a method that uses common IC fabrication techniques, can achieve low mode mixities easily and efficiently, and can be used with titanium interfaces. Results for Ti/Alumina interfacial fracture toughness are discussed and applied to the numerical study.

Nano-spring arrays for high density interconnect

A new type of compliant interconnect derived from a thin metal film fabricated with a controlled stress profile is being developed for flip- flop interconnects and probing devices. Interconnections have been demonstrated on lateral pitches as tight as 6 microns. The interconnect is highly elastic and can provide up to hundreds of microns of vertical compliance.

Modified Decohesion Test (MDT) for Interfacial Fracture Toughness Measurement in Microelectronic/MEMS Applications

Delamination of intrinsically or residually stressed thin films is commonly encountered in microelectronics and MEMS systems. Thin films typically accrue stresses through micro structural variations caused by physical vapor deposition, thermally induced stresses imposed due to thermal mismatch, and/or extrinsically introduced forces. These stresses can reach upwards of 1 GPa and can easily exceed the strength of the metal thin film interface. Knowledge of the interfacial fracture toughness (Γ) is necessary to predict if delamination will occur. However, measuring Γ is a challenge for thin film interfaces. Typical testing methods such as bimaterial cantilever, microscratch, peel, bulge, or edge lift-off are limited to organic films, cause complex stress fields, can only measure a single mode mix, or cannot achieve the large energy release rates typical of metal thin film interfaces. A new approach based on the decohesion test, called the modified decohesion test (MDT), eliminates these shortcomings of current testing methods. In this approach, a highly stressed super layer is used to drive delamination and “tune-in” the mode mix at the crack tip. Since the deformations remain elastic, a mechanics-based solution can be used to correlate test parameters to the energy release rate. Common IC fabrication techniques are used to prepare the sample and execute the test, thereby making the test compatible with current microelectronic or MEMS facilities. Varying the crack surface area rather than the energy in the super layer allows the ability to bound Γ using a single test wafer providing a 90% savings in resources and 95% savings in time. Other modifications allow application of the method to highly chemically reactive metals and decrease the sample preparation time. Design, preparation, and execution of the MDT are presented. Results of finite element models are used to validate the approach. Results are shown for a Ti/Al2 O3 interface.Copyright

Single-substrate decohesion test (SSDT) for interfacial fracture toughness measurement

We have developed a test method, called the Single-Substrate Decohesion Test (SSDT), to measure the interfacial fracture toughness for thin-film interfaces used in microelectronic applications. SSDT can be used to measure the interfacial fracture toughness over a range of mode mixity. In this work the results of the measurement of the full mode mixity versus interfacial fracture toughness curve for a submicron physical vapor deposited titanium thin film on a silicon substrate using SSDT are presented.

Measurement of the Mode Mix Dependent Interfacial Fracture Toughness for a Ti/Si Interface Using a Modified Decohesion Test

The Modified Decohesion Test (MDT), developed by the authors, eliminates shortcomings of current interfacial fracture toughness testing methods. In this approach, a highly stressed super layer is used to drive delamination and create any mode mix at the crack tip. MDT uses the change in crack surface area to vary the available energy per unit area for crack growth and thus to bound the interfacial fracture toughness. Therefore, this technique uses a single sample to measure the interfacial fracture toughness, as opposed to the decohesion test that uses several samples to be able to bound the interfacial fracture toughness. Since the deformations remain elastic, a mechanics-based solution can be used to correlate test parameters to the energy release rate. Common IC fabrication techniques are used to prepare the sample and execute the test, thereby making the test compatible with current microelectronic or MEMS facilities. In this paper, the mechanics based solution used in the MDT to correlate test parameters to the fracture metrics is discussed and compared against other analytical models. Interfacial fracture toughness results are provided for a Ti/Si interface at several mode mixes.Copyright

High density packaging of vertical-cavity surface-emitting laser arrays using micro-machined springs

We present a novel flip-chip packaging technology capable of interconnecting optoelectronic devices packed at very high density. The process utilizes micro-machined cantilevers for establishing electrical contact and is assembled at room temperature without solder. We have used the packaging technology to interconnect various optoelectronic devices, including 200-element arrays of independently addressable VCSELs having 4 /spl mu/m-wide pads on 6 /spl mu/m pitch to silicon CMOS driver chips with equally dense output lines.

Silicon and Nanoscale Metal Interface Characterization Using Stress-Engineered Superlayer Test Methods

Thin film layers are utilized in emerging microelectronics, optoelectronics, and microelectromechanical systems (MEMS) devices. Typically, these thin film layers are composed of different materials with dissimilar properties. A common mode of failure for thin films is delamination caused by external loading or intrinsic stress present in the materials. To characterize bonded thin film material systems, it is necessary to measure the interfacial fracture toughness. When material thicknesses approach micro- and nanoscales, interfacial fracture toughness measurement is a challenging task. Accordingly, innovative test techniques need to be developed to study interfacial fracture parameters. The ongoing research at Georgia Institute of Technology is developing fixtureless delamination test techniques that can be used to measure interfacial properties of micro- and nanoscale thin films. The single substrate decohesion test (SSuDT) and the single-strip decohesion Test (SSDT) are such fixtureless tests under development. In these tests, a thin film interface material of interest is deposited on a substrate. Then, delamination is driven by a superlayer material on top of the interface material. This superlayer material is sputter deposited and has high intrinsic stress. A deposited release layer material allows for the contact area between the interface material and the substrate to be controlled. These tests differ in geometry, but share the same generic methodology and can be used for a number of material systems over a wide range of mode mixities. This paper presents the methodology and implementation of the SSuDT and SSDT tests and compares results to better understand their scope. A case study of the interfacial fracture toughness as a function of mode mixity for titanium and silicon interface was performed.

Silicon, Low-K Dielectric, and Nano-Scale Metal Interface Characterization Using Stress-Engineered Superlayer Test Methods

Thin film layers are utilized in emerging microelectronics, optoelectronics, and MEMS devices. Typically these thin film layers are composed of different materials with dissimilar properties. A common mode of failure for thin films is delamination caused by external loading or intrinsic stress present in the materials. To characterize bonded thin film material systems, it is necessary to measure the interfacial fracture toughness. When material thicknesses approach micro and nano scales, interfacial fracture toughness measurement is a challenging task. Accordingly, innovative test techniques need to be developed to study interfacial fracture parameters. The ongoing research at Georgia Institute of Technology is developing fixtureless delamination test techniques that can be used to measure interfacial properties of nano-and micro-scale thin films. The modified decohesion test (MDT) and the single-strip decohesion test (SSDT) are such fixtureless tests under development. In these tests a thin film interface material of interest is deposited on a substrate and delamination is driven by a superlayer material with high intrinsic stress sputter-deposited on-top of the interface material. A deposited release layer material allows for the contact area between the interface material and the substrate to be controlled. These tests differ in geometry but share the same generic methodology and can be used for a number of material systems over a wide range of mode mixity. This paper presents the methodology and implementation of the MDT and SSDT tests and compares results to better understand their scope. A case study of the interfacial fracture toughness as a function of mode mixity for titanium and silicon interface was performed to determine which test should be used for low-k dielectric (Black DiamondTM) and tantalum. Lastly, ongoing research on low-k and tantalum interface is discussed.