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Dive into the research topics where Mohan M. Renge is active.

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Featured researches published by Mohan M. Renge.


IEEE Transactions on Power Electronics | 2008

Five-Level Diode Clamped Inverter to EliminateCommon Mode Voltage and Reduce

Mohan M. Renge; Hiralal M. Suryawanshi

The High power induction machines are designed at medium voltage (MV) rating for better performance. The multilevel inverters (MLI) are able to provide medium voltage with high quality output at low switching frequency as compared to conventional two-level inverter. In addition to this, MLI reduces dv/dt, switching losses and leakage current. In this paper, approaches to reduce and eliminate the common mode voltage (CMV) using five- level diode clamped multilevel inverter (DCMLI) are presented. The CMV spikes are also eliminated by shifting dead-time across the phase pole. A novel technique for the selection of switching states to synthesize the desire vector is proposed. This paper realizes the implementation of five-level diode clamped MLI for three phase induction motor. Experimental results demonstrate the feasibility of the proposed solution.


IEEE Transactions on Industrial Electronics | 2010

dv/dt

Mohan M. Renge; Hiralal M. Suryawanshi

In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverter using 3-D space-vector modulation (SVM) is proposed. The 3-D SVM is superset of the traditional 2-D SVM, and thus, it inherits all the merits of traditional 2-D. A simple technique for the selection of switching states to constitute the reference vector is proposed here. The computational cost of the proposed technique is independent of voltage levels of inverter. This technique is easy to implement online in digital controller. The tradeoff between quality of output voltage and CMV is achieved in this paper. This paper realizes the implementation of 3-D SVM to reduce the CMV using a five-level diode-clamped inverter for a three-phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.


Journal of Power Electronics | 2011

inMedium Voltage Rating Induction Motor Drives

Mohan M. Renge; Hiralal M. Suryawanshi

In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.


Electric Power Components and Systems | 2012

Three-Dimensional Space-Vector Modulation to Reduce Common-Mode Voltage for Multilevel Inverter

U. V. Patil; Hiralal M. Suryawanshi; Mohan M. Renge

Abstract The combination of space-vector modulation and direct torque control is presented in this article to reduce the torque ripple contents in a medium-power adjustable speed drive system of induction motor. The drive is supplied by a five level diode-clamped inverter. The results show improvement in the torque ripple contents compared with a conventional direct torque control scheme. The experimental results of output voltage of the system for a diode-clamped multi-level inverter are also presented.


Epe Journal | 2010

Multilevel Inverter to Reduce Common Mode Voltage in AC Motor Drives Using SPWM Technique

Mohan M. Renge; Hiralal M. Suryawanshi; Madhuri A. Chaudhari

Abstract Digital signal processor (DSP) based sinusoidal pulse width modulation (SPWM) uses symmetrical and asymmetrical regular sampling. These samplings do not attain the performance of natural SPWM at low sampling. This paper presents a simple technique using digital sampling to approach naturally sampled SPWM. The proposed technique samples the modulating waveform at every peak of the triangular carrier signal and calculates precise magnitude of modulating signal for the instant of intersection. This signal has enough information to minimize the error in switching instant. The original modulating signal appears in the PWM output spectra unattenuated, without any distortion components, and without phase delay, regardless of the frequency or modulation depth of that signal. The presented technique is suitable for real time implementation using commercial DSP. This technique is also applicable to multilevel inverter and does not generate superfluous pulses like asymmetrical sampling in the output voltage of multilevel inverter. Simulation and experimental results are presented to demonstrate and confirm the validity of the proposed technique.


conference of the industrial electronics society | 2014

Torque Ripple Minimization in Direct Torque Control Induction Motor Drive Using Space Vector Controlled Diode-clamped Multi-level Inverter

Amardeep B. Shitole; Hiralal M. Suryawanshi; Shelas Sathyan; Mohan M. Renge

This paper presents the adaptive notch filter based synchronization technique used for generation of reference currents for hysteresis current controlled three phase voltage source inverter. These three phase reference current components are then used to control the active power injected by the three phase voltage source inverter. In addition, the proposed control strategy can provide compensation for reactive power demands as well as harmonic load current requirements of the nonlinear loads during interconnection of inverter to the utility grid. Hysteresis current controlled technique is used to control the three phase voltage source inverter. By sensing the actual load currents, an adequate amount of active power, reactive power and harmonic current demanded by nonlinear load will be compensated with fast dynamic response into the utility grid. The effectiveness of the proposed technique is verified with injection of active and reactive power generated by three phase voltage source inverter through MATLAB/Simulink environment. An experimental work is undergoing and can be presented latter.


Electric Power Components and Systems | 2014

Digitally Implemented Novel Technique to Approach Natural Sampling SPWM

Rashmi A. Keswani; Hiralal M. Suryawanshi; Mohan M. Renge

Abstract The multi-level inverter is widely used in high-power and high-voltage applications. Multi-level inverters use a large number of switches for high power conversion, resulting in increased systems fault probability. To ensure stable operation of the system, several fault diagnosis methods have been carried out by researchers. In this article, a fault diagnostic system in a multi-level inverter using wavelet modulus maxima is developed. The working situation of the power devices of a five-level diode-clamped multi-level inverter drive system under an open-circuit fault is analyzed through MATLAB (The MathWorks, Natick, Massachusetts, USA) simulation. The wavelet modulus maxima of output phase voltages are used to detect faulty phase (leg), and wavelet modulus maxima of DC bus currents are used to detect fault type and fault switch. Wavelet analysis is used for feature extraction, which can be used as input to the expert system to develop a fault identifier. The open-circuit fault on the five-level diode-clamped multi-level inverter of power devices is carried out experimentally. The experimental prototype is developed to validate the fault analysis with simulation results.


2017 Second International Conference on Electrical, Computer and Communication Technologies (ICECCT) | 2017

Adaptive notch filter based synchronization technique for integration of distributed generation systems to utility grid

Chaitanya N. Jibhakate; Madhuri A. Chaudhari; Mohan M. Renge

Back to back (B2B) voltage source converter is used for HVDC system and ac drive system to control active-reactive power. In this paper reduced switch back to back converter is used for induction motor drive system which is operated in unity as well as leading power factor. Active and reactive power flow are independently controlled. The active power transfer is controlled by angle delta; where delta is angle between input phase voltage and rectifier fundamental voltage. Reactive power flow is controlled by controlling dc link capacitor voltage. DC link capacitor voltage is regulated using PI controller. Appropriate gate signals are generated adding dc-offset in sinusoidal pulse width modulation technique. Microchip dsPIC33EP256MU810 digital signal controller is used for generating gate signals for nine switch converter (NSC) made up of FGA25N120 IGBTs. MATLAB/Simulink and prototype experimental results are presented to validate proposed concept. By tracking overall industrial power factor; this NSC drive system can made to run at leading power factor improving overall industrial power factor.


ieee international conference on power systems | 2016

Wavelet Modulus Maxima for Single Switch Open Fault in Multi-level Inverter

Chaitanya N. Jibhakate; Madhuri A. Chaudhari; Mohan M. Renge

This paper presents an application of nine switch converter (NSC) for power factor improvement of 3-phase supply. Power factor improvement is achieved by controlling DC link capacitor voltage. To control capacitor voltage PID controller is used. Modified pulse width modulation with third harmonic injection technique is incorporated in NSC. An angle delta; between grid voltage and rectifier reference modulation is selected in such a way that bidirectional active power flow is controllable. Variation in amplitude modulation index is made to control reactive power flow. Maintaining delta angle and modulating references, appropriate gate signal is generated so as to make power factor unity as well as leading. The application of NSC for power factor improvement is well suited and verified using MATLAB/Simulink.


Iet Power Electronics | 2014

Nine-switch controlled induction motor drive with unity and leading power factor

UdayKumar V. Patil; Hiralal M. Suryawanshi; Mohan M. Renge

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Hiralal M. Suryawanshi

Visvesvaraya National Institute of Technology

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Madhuri A. Chaudhari

Visvesvaraya National Institute of Technology

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Chaitanya N. Jibhakate

Visvesvaraya National Institute of Technology

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Amardeep B. Shitole

Visvesvaraya National Institute of Technology

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Rashmi A. Keswani

Priyadarshini College of Engineering

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Shelas Sathyan

Visvesvaraya National Institute of Technology

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U. V. Patil

Visvesvaraya National Institute of Technology

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UdayKumar V. Patil

Visvesvaraya National Institute of Technology

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