Moonyong Lee

PID controller tuning to obtain desired closed loop responses for cascade control systems

A new method for PID controller tuning based on process models for cascaded control systems is proposed in this paper. The method consists of first finding the ideal controller that gives the desired closed loop response and then finding the PID approximation of the ideal controller by Maclaurin series. This method can be applied to any open loop stable processes. Furthermore, it enables us to tune the PID controllers both for the inner loop and the outer loop simultaneously while existing tuning methods tune the inner loop first and the outer loop next. Closed loop responses of cascade control loops tuned by the proposed method are compared with those of existing methods such as the frequency response method and the ITAE method. The results show that the proposed tuning method is superior to the existing methods.

Fabrication and electrical characterization of Pt/(Ba,Sr)TiO3/Pt capacitors for ultralarge-scale integrated dynamic random access memory applications

Pt/(Ba, Sr)TiO 3 /Pt capacitors are fabricated using DC and RF magnetron sputtering processes on thermally oxidized silicon wafers for ultralarge scale integrated dynamic random access memory (ULSI DRAM) applications. (Ba,Sr)TiO 3 (BST) thin film deposited at 640°C to 20 nm thickness shows an equivalent SiO 2 thickness (t oxeq ) of 0.35 nm and a leakage current density, measured at an applied voltage of 1.5 V, of about 100 nA/cm 2 . t oxeq of the BST film and leakage current density are further decreased to 0.24 nm and 40 nA/cm 2 , respectively, by postannealing at 750°C after fabrication of the top electrode.

Dividing wall column structure design using response surface methodology

Abstract Designing dividing wall columns (DWC) – energy-efficient separators of ternary mixtures – involves multivariable problem solving. These variables interact with each other and need to be optimized simultaneously to obtain the best design. In this work, a practical method employing response surface methodology (RSM) is proposed for DWC design and optimization. The optimum DWC structure can be found in a practical manner while minimizing simulation runs. The proposed method was tested in the design and optimization of an acetic acid purification process. The RSM based optimization effectively copes with interactions between optimizing variables and its predictions agreed well with the results of rigorous simulation. The DWC system designed by the proposed method decreased total annual costs by 44.57% compared with conventional distillation.

Preparation and characterization of iridium oxide thin films grown by DC reactive sputtering

Iridium oxide ( IrO2) thin films were successfully grown by a DC magnetron reactive sputtering method. It was found that the crystalline nature and morphology of IrO2 films were strongly dependent on the oxygen partial pressure, total pressure and growth temperature. The growth of IrO2 is well explained by the generic curve for the total pressure as a function of O2 content. The films showed good barrier performance between Pt and poly-Si up to 750° C. A 40-nm-thick Ba0.5Sr0.5TiO3 film was grown by RF magnetron sputtering on the Pt/IrO2/poly-Si electrode. The leakage current density and dielectric constant of a Pt/Ba0.5Sr0.5TiO3/Pt capacitor on the IrO2/poly-Si electrode were comparable to those of the capacitor on a SiO2/Si substrate. However, an additional ohmic layer was required to prevent the formation of a SiO2 layer between the IrO2 and poly-Si.

Robust PID tuning for Smith predictor in the presence of model uncertainty

Abstract This paper presents robust PID tuning for the Smith predictor in the presence of model uncertainty. The concept of the equivalent gain plus time delay (EGPTD) is introduced to incorporate robust stability in PID tuning of the Smith predictor. In particular, an application is developed for the robust tuning of the first order plus time delay (FOPTD) system and the second order plus time delay (SOPTD) system because the systems have been used extensively to describe chemical processes. The proposed tuning method can cope with simultaneous uncertainties in all parameters of the model in an efficient manner. Another important and attractive feature of the method is that it can utilize many currently available PID tuning rules. Simulation results are provided to demonstrate the availability of the method.

Preparation and Electrical Properties of SrTiO3 Thin Films Deposited by Liquid Source Metal-Organic Chemical Vapor Deposition (MOCVD)

SrTiO 3 thin films with thicknesses ranging from 30 nm to 60 nm were grown on 6-inch-diameter, platinized Si wafers by liquid source metal-organic chemical vapor deposition (MOCVD). The crystalline quality and cation concentrations of the films are strongly dependent on the deposition temperature with optimum temperatures ranging from 500°C to 550°C. Semi-conformal deposition on submicron-sized storage node patterns is obtained but further improvements in conformality and reproducibility are required. The dielectric constant is about 210 irrespective of the film thickness and leakage current densities are sufficiently small for the dynamic random access memory (DRAM) applications. SiO 2 equivalent thickness (T ox ) of the 30-nm-thick STO film is 0.51 nm. The finding that the leakage current density and dielectric constant are independent of the film thickness can be explained by a fully depleted model of the STO film.

Analytical design of fractional-order proportional-integral controllers for time-delay processes.

A new design method of fractional-order proportional-integral controllers is proposed based on fractional calculus and Bodes ideal transfer function for a first-order-plus-dead-time process model. It can be extended to be applied to various dynamic models. Tuning rules were analytically derived to cope with both set-point tracking and disturbance rejection problems. Simulations of a broad range of processes are reported, with each simulated controller being tuned to have a similar degree of robustness in terms of resonant peak to other reported controllers. The proposed controller consistently showed improved performance over other similar controllers and established integer PI controllers.

Multi-loop PI controller design based on the direct synthesis for interacting multi-time delay processes

In this article, a new analytical method based on the direct synthesis approach is proposed for the design of a multi-loop proportional-integral (PI) controller. The proposed design method is aimed at achieving the desired closed-loop response for multiple-input, multiple-output (MIMO) processes with multiple time delays. The ideal multi-loop controller is firstly designed in terms of the relative gain and desired closed-loop transfer function. Then, the standard multi-loop PI controller is obtained by approximating the ideal multi-loop controller using the Maclaurin series expansion. The simulation study demonstrates the effectiveness of the proposed method for the design of multi-loop PI controllers. The multi-loop PI controller designed by the proposed method shows a fast, well-balanced, and robust response with the minimum integral absolute error (IAE).

Enhanced disturbance rejection for open-loop unstable process with time delay.

The present study suggests a disturbance estimator design method for application to a recently published, two-degree-of-freedom, control scheme for open-loop, unstable processes with time delay. A simple PID controller cascaded with a lead-lag filter replaces the high-order disturbance estimator for enhanced performance. A new analytical method on the basis of the IMC design principle, featuring only one user-defined tuning parameter, is developed for the design of the disturbance estimator. Several illustrative examples taken from previous works are included to demonstrate the superiority of the proposed disturbance estimator. The results confirm the superior performance of the proposed disturbance estimator in both nominal and robust cases. The proposed method also offers several important advantages for industrial process engineers: it covers several classes of unstable process with time delay in a unified manner, and is simple and easy to design and tune.

Novel capacitor technology for high density stand-alone and embedded DRAMs

Novel Al/sub 2/O/sub 3/ process was developed in order to extend the applicability of reliable SIS and MIS Al/sub 2/O/sub 3/ capacitors as well as Al/sub 2/O/sub 3/ EBL for a MIM capacitor. By applying ALD process utilizing a smart growth mechanism, electrical and interfacial properties of Al/sub 2/O/sub 3/ film were surprisingly improved. The SIS and MIS Al/sub 2/O/sub 3/ capacitor technologies with ultra-low thermal budget were confirmed by producing fully working 1 Gbit DRAM with design rule of 0.15 and 0.13 /spl mu/m, respectively. Moreover, Al/sub 2/O/sub 3/ EBL for a MIM capacitor was successfully used to preserve the excellent dielectric characteristics for the application of DRAM with design-rule of 0.10 /spl mu/m, and beyond.