Morten Olavsbraten

A simple practical technique for estimating the junction temperature and the thermal resistance of a GaAs HBT

This paper shows a practical technique to find a good estimate of the junction temperature and the thermal resistance in a GaAs HBT. The technique is based on simple calculations from the physical dimensions of the HBT and the thermal material parameters, without using any specialized 3D thermal software or equipment for thermal measurements. This work should be of great value for circuit designers, who need an easy practical way of including good thermal values into models for accurate circuit simulations. Two different HBTs have been used to evaluate the technique presented. Evaluation involves comparing the junction temperature obtained by measurements performed at Caswell Technology with estimated values from the present technique.

Optimization theory applied to dynamic biasing for power amplifier performance enhancement

Driving the gate and drain biases as a function of the input power significantly enhances the efficiency of class-A and -AB amplifiers. These functions are described as low-order polynomials in order to limit the bias bandwidth, especially at the drain. This work formulates the optimization of the bias polynomial coefficients as a constrained optimization problem, describing in detail the formulation of the constraints, the structure of the cost function, as well as a relevant linearity measure. Using the random search algorithm within the field of stochastic search optimization, a set of solutions was obtained yielding power added efficiency nearly as high as 50%, while the linearity was comparable to that of a class-A amplifier.

Investiogation of linearity improvement with dynamic gate bias technique for flat gain or phase of an 10 W GaN HEMT power amplifier

Possibility of linearity improvement using a dynamic gate biasing technique for flattening a gain or a phase of a 10 W GaN HEMT PA has been investigated. It is shown that a polynomial gate tracking function of acceptable order can be used for that purpose. Linearity improvement while maintaining efficiency by flattening the phase transfer of the PA with dynamic gate bias technique has been shown in a simulation. Results are showing 5 dB better ACPR compared to a reference static bias PA. Flattening the gain of the PA does not result in any linearity improvement due to a large phase transfer change of the PA caused by dynamic gate bias.

First and second order polynomial functions for bandwidth reduction of dynamic biasing signals

A dynamic biasing method for enhancing PAE while controlling the bandwidth of the gate and drain bias signals has been presented. Simulation with a modulated signal shows a 40 point increase in PAE with an increment of 3dB in ACPR compared to a class-A amplifier. Such a system would require a drain bandwidth of only 2 times the RF signal bandwidth, which is only a fraction of that used in standard Envelope Tracking.

On the Optimization of Biasing Conditions in a Digitally-Linearized Power Amplifier

Changing the class of operation in a power amplifier (PA) affects the linearity and the efficiency of the PA. In this paper, the linearization performance and the efficiency enhancement of a Digital Predistorter (DPD) in a transmitter is evaluated with different PA classes. The digital predistorter is implemented in real-time on a Digital Signal Processor (DSP). The PA under test is a 2-stage 2-watt amplifier used in mobile terminals in Inmarsat Broadband Global Area Network (BGAN) systems. The gate bias of the PA is tunable for changing the biasing conditions. It is shown that by driving the PA into class B, we increase the memory effects and therefore reduce the effectiveness of memoryless predistortion. It was also shown that using a memoryless digital predistorter and a PA biased near class AB operation, an efficiency of about 41% is achievable while the BGAN system requirements are met.

Bandwidth Reduction for Supply Modulated RF PAs Using Power Envelope Tracking

This letter develops a new technique that significantly reduces the bandwidth requirements of the drain supply for an envelope tracked power amplifier (ET-PA). The achieved bandwidth reduction is clearly quantified, and requires almost no processing. The technique is based on developing a drain tracking voltage function that follows the power of the envelope. The use of pure power envelope tracking (PET) results in significant lower bandwidth, with some reduction of efficiency, compared with ET. A second-order PET extension doubles the PET bandwidth and achieves almost the same efficiency as ET. The validity of the PET and the second-order PET is confirmed with measurements on a 2-GHz 10-W GaN PA. The measured results show a bandwidth reduction relative to pure ET of a factor 3 to 8 for PET and 1.4 to 3.8 for the second-order PET. The corresponding efficiencies are 53% and 61.8%, compared with 63% for ET. The linearity is slightly better for PET. All measured with a 16-QAM signal and an average output power of 35.6 dBm.

Measured linearity improvement of 10 W GaN HEMT PA with dynamic gate biasing technique for flat transfer phase

In this work we present linearity improvement of a 10 W GaN HEMT PA using a dynamic gate biasing technique for flattening a transfer phase of the PA according to the instantaneous input power. A dynamic Vgs calculation was based on a one-tone power sweep measurement with a static bias. Results are showing 5.6-7.7 dB better ACPR and 4.2-4.9 percentage points better EVM compared to the reference static bias PA with a same average Pout. Furthermore, 1.7-2.7 dB higher output power with 1.3-8.5 percentage points higher PAE has been achieved compared to the reference static bias with ACPR better than 40 dBc. Moreover, it has been shown that the static measurement of this GaN PA can be used for a good prediction of the PA behavior under dynamic operation.

Investigation of the practical output load impedance sensitivity of a 10 W GaN device subject to gate bias variation

This paper shows practical output load impedance sensitivity of a 10 W GaN HEMT device depending on a gate bias. In order to determine how much the output impedance changes for different biasing points, Load Pull measurement is performed for different biasing points from deep class-AB to class-A. It has been found that load impedances for simultaneously high output power as well as high power added efficiency (PAE) do not change much. It is also shown that matching impedances for second and third harmonic, optimized for PAE have a common overlapping area. These results indicate that this device is suitable for dynamic gate biasing.

Gate control of a two-stage GaN MMIC amplifier for amplitude and phase linearization

In this paper we study static and dynamic gate biasing of a two-stage X-band MMIC GaN PA. The PA is first characterized under different bias conditions using large-signal static measurements, and the determined conditions are then applied to dynamic measurements with a 20 MHz noise power ratio (NPR) test signal. Biasing the gates of the two stages independently allows simultaneous reduction of amplitude and phase distortion. AM/AM, AM/PM and PAE measurements are obtained for three different static scenarios. Consistent results from static and dynamic tests are obtained showing NPR values exceeding 31 dB. Adding predistortion alters the efficiency of the investigated static biases by more than 4 % points.

Novel Metric Describing Total Nonlinearity of Power Amplifier With a Corresponding Figure of Merit for Linearity Evaluation and Optimization

In this work, we present a novel metric for the total PA or Tx nonlinear distortion in form of an output signal nonlinear power. The presented metric takes into account all sources of distortion and it evaluates a nonlinear distortion that appears inside and outside of the signal bandwidth. Furthermore, the FOM that acts as a signal to total distortion ratio STDR is developed. Optimizing the PA or Tx system for maximum STDR maximizes the ratio of the linear over nonlinear power of the output signal. That ensures optimal linearity and output power level. These characteristics make this technique convenient for a overall linearity evaluation and for optimization of the different linearity improvement techniques applied to the PA or Tx system.