Motoki Maeda

Fluoride Resonant Tunneling Diodes on Si Substrates

Co-integration of current C-MOS devices and new type devices which have characteristics of negative differential resistance (NDR) is attractive, because it has potentiality that highly functional circuits can be constructed by small number of devices. Resonant tunneling diode is a promising candidate for the purpose. So far, high-speed logic [1], multiple-valued memory [2] etc. have been demonstrated on III-V compound based RTDs and FETs. However, if such technologies can be applied to Si based LSIs, it will be much more beneficial. In this paper, we propose the improved RTDs made of fluoride heterostructures grown on Si as a practical device leading to the new technology field. The fluoride heterostructures were epitaxially grown on Si(111) substrates by molecular beam epitaxy method. We have reported the basic and primitive RTD structure as shown in Fig. 1(a), where the two CaF2 layers formed double barriers and the CdF2 layer formed quantum well for conductive electrons, and this type device exhibited NDR characteristics at room temperature (R.T.) [3]. However, the electrical properties have been very unstable, due to poor quality of the fluoride heterolayers. In this paper, we propose the new structure grown with particular techniques as shown in Fig. 1(b), and simple logic operation is demonstrated for the first time. Basically, there were two significant problems resulting in the unstable operation of the RTDs. These are (1) pin-hole generation in the initial CaF2 layers grown directly on Si, and (2) very low growth temperature (around at R.T.) for over grown layers which is limited by undesirable chemical reaction between Si and CdF2. The former is an origin of large leakage current, and the latter results in poor crystallinity of the overgrown layers. The two particular techniques were employed in this work to overcome these problems. Each technique has been developed independently, and they are combined for the first time in this work. First is the post oxidation technique for the initial CaF2 layer [4]. In this technique, growth was interrupted after the growth of the initial CaF2 layer so that the sample was thermally oxidized to form thin oxide on bottom of the pinholes, and the following fluoride layers were re-grown. The RTDs fabricated by employing this technique exhibited very large peak-to-valley current ratio (PVR). The second is the use of CaxCd1-xF2 alloy and structure with drift separation layer between Si surface and active region of double barrier RTD [5], as shown in Fig. 1(b). This technique enables high temperature growth of overgrown layers by reducing chemical reaction between Si and CdF2. The RTDs with Ca0.1Cd0.9F2 alloy exhibited larger PVR than those with pure CdF2 in [5]. The new RTDs as shown in Fig. 1(b) were fabricated by combining the post thermal oxidation technique and the use of alloy with separation layer structure. The growth conditions such as oxidation temperature and time, composition of the alloy, and growth temperature of overgrown layers were further optimized (as shown in Fig. 1(b)) from the previous works (as shown in [4] and [5]). As a result, I-V characteristic at room temperature was obtained as shown in Fig. 2. Although PVR was not so large compared to previously observed value such as over 10 [4], stability of the characteristics for repeated current flows was much improved. Based on the results, a simple SRAM type memory circuit was constructed using the RTD, a discrete bipolar transistor and a switch as shown in Fig. 3, in which the transistor was biased so that bistable operation could be obtained as shown in Fig. 4. Figure 5 shows the memory operation of this circuit. It was observed that state (high or low) of bit line was written by each switch operation repeatedly and the state of memory node was read from output terminal. In conclusion, properties of the fluoride RTDs on Si substrates were much improved by the new process techniques and logic circuit operation was achieved for the first time by using the improved RTDs.

Fluoride resonant tunneling diodes on si substrates improved by additional thermal oxidation process

An oxidation process was applied to the fabrication of fluoride resonant tunneling diodes (RTDs) on Si substrates. The oxidation process was carried out after the growth of an ultrathin CaF2 layer on Si, and expected to passivate the Si surface in pinholes generated in the CaF2 layer. Leakage currents of Au/Al/CaF2/Si(111) metal insulator semiconductor (MIS) diodes were extremely reduced by introducing this process. Au/Al/CaF2/CdF2/CaF2/Si(111) double-barrier RTDs were also fabricated by introducing this process, the leakage currents of which were extremely reduced and a very large peak to valley current ratio (PVCR) of 1500 was obtained. It was also shown that the chemical reaction between a CdF2 well layer and the Si substrate was suppressed by the oxidation process. Owing to this effect, high-temperature growth (up to 300°C) of the CdF2 well layer was realized for the first time in the fluoride RTDs, and resulted in the reduction of undesirable current drift.

Heteroepitaxy of Cd-Rich CaxCd1-xF2 Alloy on Si Substrates and Its Application to Resonant Tunneling Diodes

Epitaxial growth of Cd-rich CaxCd1-xF2 alloy with small composition x on Si(111) substrates was investigated in order to obtain improved fluoride resonant tunneling diodes (RTDs). The direct growth of CdF2 on Si substrates was studied from the viewpoint of surface roughening and sticking coefficient, and it was revealed that the origin of growth instability of CdF2 was the direct reactivity of CdF2 with Si. This phenomenon was controlled by addition of a small amount of CaF2 to CdF2, forming a Cd-rich CaxCd1-xF2 alloy. It was found that the growth temperature of Cd-rich CaxCd1-xF2 on bare Si at which apparent re-evaporation was observed was higher than that of pure CdF2, and that the surface roughness of the layers grown at room temperature on thin CaF2 buffer layers was reduced by the addition of only 5% CaF2 to CdF2. Furthermore, RTDs using the Cd-rich CaxCd1-xF2 layer for the quantum well layer were fabricated, and stable operation and improved characteristics were obtained compared to the conventional RTDs using pure CdF2 layers.

Evaluation of variable energy level of conduction band edge on fluoride resonant tunneling diodes

Resonant tunneling diodes (RTDs) using CaF2-barrier/Cd-rich CaxCd1-xF2 alloy-well/CaF2-barrier heterostructures were fabricated by molecular beam epitaxy on Si(111) substrates. The composition, x, was varied from 0 to 0.3. It was found that the peak voltages for these diodes were shifted with the variation of x of the alloy-well layer. By the theoretical analysis of the results, the energy level of conduction band edge of CaxCd1-xF2 for each x was determined. Consequently, it turned out that the energy level changed linearly with x, in other words, the energy level followed Vegards law. It was demonstrated that the bottom energy level of a quantum well composed of the fluoride heterostructures could be controlled by the composition of the alloy.

Resonant Tunneling Diodes on Si Substrates Using Fluoride Heterostructures and Feasibility of Application to Integrated Circuits

Resonant tunneling diodes (RTDs) composed of heteroepitaxial fluorides on Si substrates have been investigated as a candidate of Si-based highly functional quantum device. Problems for growth of good heterostructure were overcame by various techniques such as post oxidation, introduction of fluoride alloy system, improved heterostructures and V-grooved structures. These techniques improved electrical properties and stability of the fluoride RTDs significantly, and made such devices realistic candidates for co-integration in the Si-based integrated circuits

Fabrication of Fluoride Resonant Tunneling Diodes on V-Grooved Si(100) Substrates

Fluoride resonant tunneling diodes (RTDs) composed of CaF2/CdF2 heterolayers were fabricated in the V-grooved structures surrounded by (111) faces, which were preferred for the growth of the fluoride layers. The structures were formed by anisotropic etching with potassium hydroxide (KOH) or tetramethyl ammonium hydroxide (TMAH) on Si(100) substrates. In the case of KOH etching, RTDs with a high peak to valley current ratio (PVCR) over 105 were obtained. Although the yield of RTDs whose active region was grown directly on the etched surface was very low because of surface roughness, an improved RTD structure, in which the CaxCd1-xF2 separation layer was inserted under the active region, exhibited higher yield. In the case of TMAH etching, the yield was higher than for KOH etching for directly grown RTD structures due to the presence of a smoother etched surface. These results show that the new method proposed in this work is an effective process to fabricate fluoride RTDs on Si(100) substrates.

Resonant tunneling devices on Si(111) substrates using fluoride alloy heterostructures

Resonant tunneling diodes (RTDs) composed of CaF/sub 2/-barrier/CdF/sub 2/-well/CaF/sub 2/-barrier/Si(111) heterostructures are expected to be co-integrated with Si-LSI. The alloy of CaF/sub 2/ and CdF/sub 2/, namely Ca/sub x/Cd/sub l-x/F/sub 2/, was investigated in order to improve characteristics of the RTDs. The barrier height of the RTDs was found to be lowered by using Ca/sub 0.5/Cd/sub 0.5/F/sub 2/ instead of CdF/sub 2/. It was also found that the Cd-rich (x<0.3) alloy could be grown with good crystallinity even at higher temperature than that for pure-CdF/sub 2/. RTDs using the Cd-rich alloy for the well layer exhibited large peak to valley current ratio at room temperature due to the good crystallinity.