Nagesh Geddada

A DSTATCOM Topology With Reduced DC-Link Voltage Rating for Load Compensation With Nonstiff Source

The distribution static compensator (DSTATCOM) is used for load compensation in power distribution network. In this paper, a new topology for DSTATCOM applications with nonstiff source is proposed. The proposed topology enables DSTATCOM to have a reduced dc-link voltage without compromising the compensation capability. It uses a series capacitor along with the interfacing inductor and a shunt filter capacitor. With the reduction in dc-link voltage, the average switching frequency of the insulated gate bipolar transistor switches of the DSTATCOM is also reduced. Consequently, the switching losses in the inverter are reduced. Detailed design aspects of the series and shunt capacitors are discussed in this paper. A simulation study of the proposed topology has been carried out using power systems computer-aided design simulator and the results are presented. Experimental studies are carried out to verify the proposed topology.

STFT analysis of high frequency components in transient signals in multi-terminal HVDC system

High voltage DC (HVDC) system is important transmission technology, with several advantages over the AC transmission system. Transient analysis plays an important role in the power systems, in particular for the multi-terminal DC (MTDC) system. In DC systems, the DC line fault can result in extremely fast rising current compared to its AC counterpart due to absence of the line inductance. Therefore, the analysis of fast transients is of great interest in the HVDC system, in particular for MTDC system. In this paper, the application of Short Time Fourier Transform (STFT) in transient analysis of current signals in the MTDC system has been investigated. Because of uncertainty principle with the STFT, finer time resolution has been chosen at the expense of frequency resolution, allowing for faster detection. The CIGRE B4 multi-terminal DC grid system has been modeled in PSCAD/EMTDC, and transient events are simulated. The steady-state and the transient currents in the different terminals are monitored and analyzed using the STFT.

DSTATCOM with LCL filter using synchronous reference frame current controller

This paper presents a inductor-capacitor-inductor (LCL) filter with sine pulse width modulation (SPWM) based switching control strategy for two-level neutral-point-clamped (NPC) voltage source inverter (VSI) in Distribution Static Compensator (DSATCOM). Interface LCL filter between VSI and point of common coupling (PCC) is used to minimize the switching harmonic ripple in compensated PCC voltage and source currents. Modeling, design details of LCL filter are presented and synchronous reference theory is used for reference filter current generation. Synchronous reference frame (dqo) current controller with proportional integral (PI) and sinusoidal signal integral (SSI) regulators, along with active damping feature for LCL filter (using filter capacitor current feed back) is used for proper control and operation of DSTATCOM. Detailed simulation study to compensate unbalanced nonlinear load with interface LCL filter and L filter DSTATCOM is carried out in PSCAD 4.2.1 simulator, and the corresponding results are presented.

Analysis and validation of wavelet transform based DC fault detection in HVDC system

Abstract Fault detection plays an important role in both conventional AC and upcoming DC power systems. This paper aims to study the application of discrete wavelet transform (WT) for detecting the DC fault in the high voltage DC (HVDC) system. The methods of choosing the mother wavelet suited for DC fault is presented, based on degree of correlation to the fault pattern and the time delay. The wavelet analysis is performed on a multi-terminal HVDC system, built in PSCAD/EMTDC software. Its performance is judged for critical parameter like the fault location, resistance and distance. The analysis is further extended to validation using results from experiment, which is obtained from a lab-scale DC hardware setup. Load change, one of the transient disturbances in power system, is carried out to understand the effectiveness of the wavelet transform to differentiate it from the DC fault. The noise in the experimental result gives rise to non-zero wavelet coefficient during the steady-state. This can be improved by removing the unwanted noise using right filter while still retaining the fault-induced transient. The wavelet transform is compared with short-time Fourier transform to highlight the issue with window size and noise.

Circulating current controller in dq reference frame for MMC based HVDC system

This paper presents a phase shifted triangular carrier pulse width modulation technique for control of modular multilevel converter (MMC) based HVDC system. This switching modulation technique has reduced average switching frequency when compared to conventional method where switching state changes in each sampling period or control cycle. A dq reference frame based circulating current controller (CCC) is implemented to suppress the double line frequency arm circulating currents of MMC. Details regarding the outer loop power control and DC bus voltage control for transmitting desired amount of power through HVDC system are also discussed. A detailed matlab simulink model of eight submodules (SM) per arm MMC based HVDC system was developed and the corresponding simulation results are presented. Simulation studies with and without CCC are carried out and the corresponding variation in arm currents, SM capacitor voltages are also discussed.

Modified DSTATCOM Topology with Reduced DC Link Voltage for Reactive and Harmonic Power Compensation of Unbalanced Nonlinear Load in Distribution System

Abstract This paper proposes a modified four-leg distribution static compensator (DSTATCOM) topology for compensation of unbalanced and nonlinear loads in three-phase four-wire distribution system. DSTATCOM, connected in parallel to the load, supplies reactive and harmonic powers demanded by unbalanced nonlinear loads. In this proposed topology, the voltage source inverter (VSI) of DSTATCOM is connected to point of common coupling (point of interconnection of source, load, DSTATCOM) through interface inductor and series capacitance, unlike the conventional topology which consists of interface inductor alone. Load compensation with a lower value of input DC link voltage of VSI is possible in this modified topology compared to conventional topology. A comparative study on modified and conventional topologies in terms of voltage rating of inverter power switches, switching losses in VSI and power rating of input DC capacitor of VSI is presented. The detailed design aspects of DC link capacitor and interface series capacitor are also presented. The reference filter currents are generated using instantaneous symmetrical component theory and are tracked using hysteresis current control technique. A detailed simulation study is carried out, to compare the compensation performances of conventional, modified topologies using PSCAD simulator and experimental studies are done to validate the simulation results.

Fault and load change differentiation in High Voltage Direct Current (HVDC) system

High Voltage Direct Current (HVDC) system has come a long way to shift the direction of power transmission in future. With respect to that, the protection is still one of the hot topics that need to be addressed, particularly the DC fault detection method. This paper presents the fault simulation study of a two-terminal HVDC system. DC fault and load change are of interest here. With the help of wavelet transform, these two cases can be differentiated by determining the wavelet coefficient of DC line current. Details regarding synchronous reference frame dq current controller at source terminal, RMS method controller at load terminal are also discussed and the corresponding obtained simulation results for steady state, load change and fault conditions using Matlab/Simulink are presented.

Improved Load Compensation using Harmonic Compensator in dq0 Current Controller for DSTATCOM

Abstract This paper presents distribution static compensator (DSTATCOM) with dq0 current controller and sine pulse width modulation (SPWM) switching for compensation of unbalanced nonlinear load in distribution system. DSTATCOM, connected in parallel to load at the point of common coupling (PCC), is used for supplying reactive and harmonic components of load current demand. This dq0 current controller is implemented in synchronous reference frame (SRF) rotating at fundamental frequency and consists of harmonic compensation (HC) regulator along with proportional integrator (PI) regulator. HC regulator is realized by number of sinusoidal signal integrators (SSIs) in parallel. The SSI provides high gain for tuned harmonic frequency and helps in minimizing filter current tracking error while compensating for load harmonic currents. Zero-axis controller, which compensates load neutral current and helps in obtaining balanced utility currents, is provided along with d, q controllers. SPWM switching generates inverter gating pulses at constant frequency, which reduces stress levels on VSI switches and simplifies the design of interface filter. Simulation studies of DSTATCOM load compensation with dq0 current controller are carried out in Matlab/Simulink and experimental verification is done using dSpace 1104 with Matlab real-time interface (RTI).

LCL Filter with Active Damping using PI and SSI Regulators in Synchronous Rotating Reference Frame Current Controller for DSTATCOM

Abstract This article proposes a distribution static compensator (DSTATCOM) with interface LCL (inductor-capacitor-inductor) filter for load compensation in three-phase four-wire distribution system. DSTATCOM, consisting of voltage source inverter (VSI), is connected in parallel to the load and injects currents corresponding to load reactive, harmonic powers. But this injected current consists of unnecessary high-frequency switching ripple generated by VSI. This LCL filter has superior switching ripple attenuation capability compared to L filter. Moreover, this can be achieved with small value of overall LCL filter inductance than L filter. Thus providing high slew rate for output current to track the desired reference current closely, reducing voltage drop across it, as well as cost and size of filter. However, one major concern with LCL filter is its resonating frequency (determined from its L, C, L values), which can create high-resonance oscillating currents and results in improper load compensation. Therefore, in this study, proper design of LCL filter with high switching ripple attenuation and a current controller with proportional integral (PI) plus harmonic compensation (HC) regulators along with active damping feature of LCL filter in synchronous rotating reference (dq0) frame are presented. HC regulator minimizes the steady-state error in the non-sinusoidal filter currents (fundamental and harmonic) which are tracked by the VSI. Active damping feature (obtained by capacitor current feedback control of LCL filter) is used to overcome resonance oscillations and provides proper control, operation of DSTATCOM under steady-state and dynamic load conditions. Stability studies for designed LCL filter and current controller using Bode and root locus plots are also performed and presented. Extensive simulation study, to understand the compensation performance of LCL filter DSTATCOM with two types of current controllers (PI and PI plus HC) under steady-state and dynamic load conditions, is carried out in PSCAD simulator and the corresponding results along with THDs of various parameters are presented.