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Dive into the research topics where Naoya Saiki is active.

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Featured researches published by Naoya Saiki.


electronics system integration technology conference | 2010

Modeling and validation of evaluation method on IC chip pick-up performance of dicing/die bonding tape

Naoya Saiki; Kazuaki Inaba; Kikuo Kishimoto; Hideo Seno; Isao Ichikawa

A method to evaluate pick-up performance of dicing/die bonding tapes has been developed numerically and experimentally. In the pick-up process, IC chip with adhesive film is peeled off the base material, by pushing the backside of the base material with protruding needles. As the result of peel test and pick-up test, there were two types of pick-up behaviors correlated to the peeling behaviors. The peel force of one type decreased as the peel speed increased, and the peel initiation was critical in the pick-up test. In the evaluation method, the minimum needle displacement of peel initiation was estimated by the shear stress around protruding needles. The peel force of other type increased as the peel speed increased, and the peel propagation was critical in the pick-up test. In the evaluation method, the peel energy was calculated from the peel force. The finite element method was applied to calculate the energy release rate of the pick-up process for various peel lengths. The minimum needle displacement to complete the peel propagation was estimated by comparing the peel energy and the energy release rate. The predicted minimum needle displacements in both cases were in good agreement with the experimental results.


Key Engineering Materials | 2011

Investigation of the Correlation between IC Chip Pick-Up Performance and Peeling Behavior of Adhesive Tapes

Naoya Saiki; Kazuaki Inaba; Kikuo Kishimoto; Hideo Seno; Kazuhiro Takahashi

It was investigated that the influences of the peeling behavior of adhesive tapes in peeling tests on IC chip pick-up performance. Needles peel off an IC chip with an adhesive film from the base material in the pick-up process, by sticking out the backside of the base material. In the case that the peeling forces of the adhesive tape decrease as the peeling speeds increase in peeling tests, only two kinds of behaviors were observed in pick-up test; the peeling propagated little and the IC chip was not peeled off under critical needle displacement while the pick-up was completed instantaneously over critical needle displacement. In the case that the peeling forces of the adhesive tape increase as the peeling speeds increase, the pick-up time decreased as the needle displacement increased. As a result, it can be concluded that the needle displacement where the peeling propagates instantaneously is critical for succeeded pick-up if the peeling forces of the adhesive tape decrease as the peeling speeds increase. If the peeling forces of the adhesive tape increase as the peeling speeds increase, the information of peeling speeds at each needle displacement are needed to estimate how long it takes to pick-up a chip.


ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1 | 2011

Evaluation of the Reliability of Film Adhesives Under Hygrothermal Condition

Naoya Saiki; Kazuaki Inaba; Kikuo Kishimoto; Hideo Senoo

Mechanical evaluation method of adhesive strength for bonding IC chips in chip-stacked packages is investigated. These film adhesives are required to bond IC chips securely under JEDEC moisture/reflow test. The stress condition of film adhesives under the moisture/reflow test is analyzed by FEM to clarify proper stress condition for the adhesive test. Thermal strain, moisture expansion and strain induced by vapor pressure is considered. It is found that the shear stress is the main loading factor on reflow process in the analysis. A shear test using chevron-shaped chip is proposed as the adhesive test, which apply shear load to the film adhesive at the corner of a chip. The specimen is fabricated by the same process of actual semiconductor manufacturing. The evaluation method is conducted without any problem. The proposed method is thought to be suitable for film adhesives of chip bonding.Copyright


Archive | 2005

Marking method and sheet for both protective film forming and dicing

Naoya Saiki; Tomonori Shinoda; Akie Hamasaki


Archive | 2007

Sheet for forming protection film for chip

Naoya Saiki; Tomonori Shinoda; Osamu Yamazaki


Archive | 2007

Adhesive composition, adhesive sheet and production process for semiconductor device

Naoya Saiki; Isao Ichikawa; Hironori Shizuhata; Osamu Yamazaki


Journal of Applied Polymer Science | 2008

UV/heat dual-curable adhesive tapes for fabricating stacked packages of semiconductors

Naoya Saiki; Osamu Yamazaki; Kazuyoshi Ebe


Archive | 2007

Sheet for Forming a Protective Film for Chips

Naoya Saiki; Tomonori Shinoda; Osamu Yamazaki


Archive | 2005

Adhesive Sheet For Both Dicing And Die Bonding And Semiconductor Device Manufacturing Method Using The Adhesive Sheet

Yasuki Fukui; Osamu Yamazaki; Naoya Saiki


Archive | 2005

Hardenable pressure-sensitive adhesive sheet for semiconductor and process for producing semiconductor device

Naoya Saiki; Osamu Yamazaki; Akie Hamasaki

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Kazuaki Inaba

Tokyo Institute of Technology

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Kikuo Kishimoto

Tokyo Institute of Technology

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Yasuki Fukui

National Archives and Records Administration

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Masashi Shimizu

Tokyo Institute of Technology

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