Nazir Hossain

A new approach of presenting reversible logic gate in nanoscale

Conventional lithography-based VLSI design technology deployed to optimize low-powered-computing and higher scale integration of semiconductor components. However, this downscaling trend confronts serious challenges of tunneling and leakage current increment to the Complementary Metal–Oxide–Semiconductor (CMOS) technology on nanoscale regimes. To resolve the physical restriction of the CMOS, Quantum-dot Cellular Automata (QCA) technology dedicates for the nanoscale technology that embrace a new information transformation technique. However, QCA is limited to the design of the sequential and combinational circuits only. This paper presents some highly scalable features reversible logic gate for the QCA technology. In addition, proposed layout compared with CMOS technology, offer a better reduction in size up to 233 times.

Measurement of gate delay in Armchair Graphene nanoribbon considering degeneracy factors

Armchair Graphene nanoribbons (A-GNRs) are widely used because of their semiconducting electronic properties in nano-sized transistor. One of the important electronic properties of A-GNR based device is capacitance formed in channel and another one is gate delay. The classical capacitance which is only determined by device geometry gives linear response. But when device is turn on and controlled by a gate voltage, classical capacitance does not give complete information of carrier transport through GNR channel. For this quantum capacitance must be considered. Upon classical capacitance, quantum capacitance as well as for gate capacitance calculation delay faced by carrier is observed. This work presents an calculation of the bandgap, classical and quantum capacitance considering two different regime like i) degenerate regime and ii) non-degenerate regime of A-GNRs. We will also observe the carrier concentration through the A-GNR for considering a degeneracy factor. Than from the mutual effect of capacitance gate delay will be observed by varying gate voltage. At last we will measure cutoff frequency from calculated gate delay.

Measurement of gate delay in armchair graphene nanoribbon considering degenerate regime

Graphene nanoribbons (GNRs) are considered as a tremendous discovery in the beginning of 21st modern science. For the demanding of using semiconducting electronic properties armchair GNRs are born. To observe the electron transport through A-GNR based field effect transistor one of the important properties of these device is capacitance through channel and dielectric substance, gate delay. The classical capacitance which is only determined by GNR width and insulator thickness failed to discuss the behavior of electron through channel. In these factor quantum capacitance which works in any integer nature of gate voltage is termed as degenerate regime quantum capacitance. Including above all mentioned capacitance gives a total capacitance in gate which is faced by electron. Upon this observation delay faced by carrier for gate capaciatnce and cut off frequency can be observed without considering other capacaitance. This work presents an investigation and calculation of the bandgap structure and the classical and quantum capacitance in degenerate regime of A-GNRs. Then using calculated value the gate delay will be observed for corresponding gate voltage. At last we will measure cutoff frequency neglecting other capacitance formed in A-GNR based FET.

Simulation of quantum capacitance in graphene nanoribbons considering channel width variation

Graphene nanoribbon (GNR) relinquishes the zero band gap technology provides the promising candidates in electronic conduction. Lessening the width in nano scale as a ribbon creates considerable bandgap. The effect of changing the width of GNR, classical capacitance follows the linear curve need higher analysis of quantum capacitance in different regime using variation of width method. Persistence of quantum phenomena is observed through comparison of quantum capacitance and classical capacitance in nano scale device. In this paper at first we will observe the band gap energy for varying GNRs width. We will also calculate classical capacitance by varying again GNRs width. But classical capacitance does not give full information when electron goes through GNR channel. For this we will calculate a capacitance formed in GNR by varying GNRs width called quantum capacitance considering two regime named as degenerate and nondegenerate regime. From this we will get information that among classical capacitance, quantum capacitance in degenerate and nondegenerate regime which one dominates or is dominated over another. Upon this a compromise of between width of GNR and capacitance is the better designing of GNR based device in nanotechnology.

A new level sensitive D Latch using Ballistic nanodevices

In this paper, a D-Latch design using Ballistic Deflection Transistors (BDT) is presented. BDT technology was developed and experimentally proven to operate at THz frequencies. A simple, compact fit based analytical BDT model, developed previously to aid circuit design was utilized in this paper. The empirical device model is integrated into a behavioral Verilog A module to facilitate the investigation of the D-latch design. The D-latch design is based on the concept of BDT multiplexer structure and has been built using two instances of a single BDT modeled in Cadence AMS simulator. The simulation results confirm the correct operation of the D-latch.

Monte Carlo modeling of ultra-fast operating Ballistic Deflection Transistor

This paper presents Monte Carlo simulations of a unique non-linear device called Ballistic Deflection Transistor. A self-consistent model for surface charges has been used and has shown a remarkable efficiency to reproduce the non-linearity. A dynamic analysis is completing the transistor study. Results are showing very good response to an ultra-fast excitation. These are confirming Terahertz performances of our device, leading to the development of more efficient logical computing circuits.

Modeling and Study of Two-BDT-Nanostructure based Sequential Logic Circuits

In this paper, study of different digital logic circuits developed using two-BDT ballistic nanostructure is presented. New D flipflop (DFF) based on the same nanostructure is also proposed. The logic structure comprises two ballistic deflection transistors (BDTs) that are experimentally proven to operate at Terahertz frequencies. The non-linear behavior of the BDTs transfer characteristic has been perfectly reproduced by means of Monte Carlo simulations, where a specific attention has been devoted to surface charges. An analytical model built on the results of advanced MC simulations has been integrated into a behavioral Verilog AMS module to confirm the functionality of the circuit design. The module is used to analyze operating conditions of different combinational circuits and to investigate the feasibility of DFF design using BDT nanostructure. The simulation results indicate successful operation of both combinational and sequential circuits developed using two-BDT logic structure under proper biasing of gate and source terminals. The operating voltages of the proposed DFF are estimated to be ± 225mV.

Polaron effect on ballistic transport in armchair graphene nanoribbon

Graphene nanoribbon has altered the perspective of future electronics device industries. Post silicon based technology, Graphene nanoribbon is now considered the most promoting materials for the next generation electronics. Armchair graphene nanoribbon is one of two prototypes of graphene which is widely known for its semiconducting properties limited by width length below 50nm. However, some of the shortcoming of potential application remain obscure to expound. Here we investigate the ballistic transport performance of armchair graphene nanoribbon and the potential disturbance of polaron. Photon excitation with incorporating lower bandgap in armchair graphene tends to develop polaron. Through the generation of polaron due to the temperature variation, two dimensional armchair nanoribbon no longer respond as ballistic media to transport carriers. It has been found that the mean free path and mobility performance of carriers are affected due to the polaron effect.

A high performance Full Adder based on Ballistic Deflection Transistor technology

In this paper, we propose a 1-bit Full Adder circuit built with Ballistic Deflection Transistors (BDT). BDT is a disruptive technology based on AlGaAs/InGaAs heterostructure. Different combinational circuits were successfully realized using BDT NAND gate and General Purpose Gate (GPG) structures. The developed circuit is an extension of BDT GPG and different from that of the previously implemented adder circuit. The proposed Adder consists of Sum and Carryout structures, comprising seven and five BDTs, respectively. Monte Carlo modeling of a BDT NAND Gate, which consists of associating two BDTs, has been performed and the obtained I-V characteristics were integrated with Verilog AMS to investigate the feasibility of the proposed circuit. Simulation results performed on Cadence Spectre simulator indicate the correct functionality of the proposed full adder.

Ballistic deflection transistor very high frequency modeling

To respond to the increase of worldwide information demand, in terms of quantity and speed, many different ways in electronics are developed. In the field of semiconductor devices, the Ballistic Deflection Transistor (BDT) [1] can have a significant impact. Indeed, an ultra-fast electron motion associated with a unique non-linear behavior allows this component to be a major actor for new kind of Terahertz (THz) logical circuits. The aim of this work is to provide theoretical analysis of this device under ultra-high frequency excitation. The BDT, presented in Fig. 1, is a planar six-terminal structure etched on an InAlAs/InGaAs heterostructure which provide a two dimensional electron gas. Unlike classic transistors, where the flow of electron is switched off and on, the concept of BDT is to steer the carriers from one side to another, thanks to two gates (in push-pull configuration: VLG=-VRG) and a triangular deflector strategically positioned, while maintaining their ballistic motion. This device offers a non-linear transfer characteristic, shown in Fig. 2, which grants operating opportunities at very high frequency [2].