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Featured researches published by Neil George Bartow.


national computer conference | 1970

System/360 model 85 microdiagnostics

Neil George Bartow; Robert McGuire

System/360 Model 85 is a large central processing unit, (CPU), which contains a machine cycle of 80 nanoseconds and a main storage access of 1.2 microseconds. It has the capability of executing 12,500,000 add register to register type instructions per second. Its major parts are the Instruction Preparation Unit, (I Unit), Instruction Execution Unit, (E Unit), and Storage Control Unit, (SCU). In addition to these three main parts, there is also another portion of the hardware dedicated to maintenance controls. The IBM Model 85 computer has high speed buffer storage and hardware capable of initiating and executing Instruction Retry. There are two major control storage elements. Read Only Storage, (ROS), and Writeable Control Storage, (WCS). ROS consists of 2,048 decimal control words while WCS consists of 512 control words for a standard Model 85 or 1024 control words for a Model 85 with an emulator feature. Each control word is 128 bits long and consists of 33 control fields as illustrated in Figure 1---Model 85 Control Word. Approximately 450 microorders have been implemented in the Model 85 for use in microprogramming.


Archive | 1992

Configurable, recoverable parallel bus

Neil George Bartow; Robert Stanley Capowski; Louis Thomas Fasano; Thomas A. Gregg; Gregory Salyer; Douglas Wayne Westcott


Archive | 1993

Frame group transmission and reception for parallel/serial buses

Neil George Bartow; Paul Joseph Brown; Robert Stanley Capowski; Louis Thomas Fasano; Thomas A. Gregg; Gregory Salyer; Douglas W. Wescott; Vincent P. Zeyak


Archive | 1992

Communications system having plurality of originator and corresponding recipient buffers with each buffer having three different logical areas for transmitting messages in single transfer

Neil George Bartow; Paul Joseph Brown; Robert Stanley Capowski; Louis Thomas Fasano; Thomas A. Gregg; Gregory Salyer; Douglas Wayne Westcott


Archive | 1995

Allowed operational-link transceiver table verifies the operational status of transceivers in a multiple conductor data transmission link

Neil George Bartow; Steven N. Goss; Douglas Wayne Westcott


Archive | 1993

Apparatus and method for communicating a quiesce and unquiesce state between elements of a data processing complex

Neil George Bartow; Steven N. Goss; Douglas Wayne Westcott


Archive | 1995

Interconnect failure detection and cache reset apparatus

Neil George Bartow; Robert Stanley Capowski; Louis Thomas Fasano; Thomas A. Gregg; Gregory Salyer; Douglas Wayne Westcott


Archive | 1993

Linking elements of a data processing complex

Neil George Bartow; Robert Stanley Capowski; Louis Thomas Fasano; Thomas A. Gregg; Gregory Salyer; Douglas Wayne Westcott


Archive | 1994

Configuration of intersystem channels

Neil George Bartow; Steven N. Goss; Douglas Wayne Westcott


Archive | 1993

Frame-Group-Übertragung (und Empfang) für parallele/serielle Bus-Systeme Frame Group transmission (and reception) for parallel / serial bus systems

Neil George Bartow; Paul Joseph Brown; Robert Stanley Capowski; Louis Thomas Fasano; Thomas A. Gregg; Gregory Salyer; Patrick J. Sugrue; Douglas Wayne Westcott; Vincent P. Zeyak

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