Nicholas J. Richardson

Coherent cache structures and methods

Dynamic arbitration system and method

Combination asynchronous cache system and automatic clock tuning device and method therefor

Deadlock resolution methods and apparatus for interfacing concurrent and asynchronous buses

Combined consective byte update buffer

Method and apparatus for maintaining coherency for data transaction of CPU and bus device utilizing selective flushing mechanism

Deadlock prevention in a two bridge system by flushing write buffers in the first bridge

Efficient soft reset in a personal computer

System margin and core temperature monitoring of an integrated circuit

System to improve trapping of I/O instructions in a peripheral component interconnect bus computer system and method therefor