Nicola Massari

A 100

An ultra-low power 128 times 64 pixels vision sensor is here presented, featuring pixel-level spatial contrast extraction and binarization. The asynchronous readout only dispatches the addresses of the asserted pixels in bursts of 80 MB/s, significantly reducing the amount of data at the output. The pixel-embedded binary frame buffer allows the sensor to directly process visual information, such as motion and background subtraction, which are the most useful filters in machine vision applications. The presented sensor consumes less than 100 muW at 50 fps with 25% of pixel activity. Power consumption can be further reduced down to about 30 muW by operating the sensor in Idle-Mode, thus minimizing the sensor activity at the ouput.

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This paper presents the design and characterization of a lock-in pixel array based on a buried channel photo-detector aimed at time-of-flight range imaging. The proposed photo-demodulator has been integrated in a 10-μm pixel pitch with a fill factor of 24%, and is capable of a maximum demodulation frequency of 50 MHz with a contrast of 29.5%. The sensor has been fabricated in a 0.18-μm CMOS imaging technology and assembled in a range camera system setup. The system provides a stream of three-dimensional images at 5-20 fps on a 3-6 m range, with a linearity error lower than 0.7% and a repeatability of 5-16 cm, while the best achievable precision is 2.7 cm at a 50-MHz modulation frequency.

W 128

A 64 × 64-pixel ultra-low power vision sensor is presented, performing pixel-level dynamic background subtraction as the low-level processing layer of an algorithm for scene interpretation. The pixel embeds two digitally-programmable Switched-Capacitors Low-Pass Filters (SC-LPF) and two clocked comparators, aimed at detecting any anomalous behavior of the current photo-generated signal with respect to its past history. The 45 T, 26 μm square pixel has a fill-factor of 12%. The vision sensor has been fabricated in a 0.35 μm 2P3M CMOS process, powered with 3.3 V, and consumes 33 μ W at 13 fps, which corresponds to 620 pW/frame.pixel.

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A prototype of a 34 /spl times/ 34 pixel image sensor, implementing real-time analog image processing, is presented. Edge detection, motion detection, image amplification, and dynamic-range boosting are executed at pixel level by means of a highly interconnected pixel architecture based on the absolute value of the difference among neighbor pixels. The analog operations are performed over a kernel of 3 /spl times/ 3 pixels. The square pixel, consisting of 30 transistors, has a pitch of 35 /spl mu/m with a fill-factor of 20%. The chip was fabricated in a 0.35 /spl mu/m CMOS technology, and its power consumption is 6 mW with 3.3 V power supply. The device was fully characterized and achieves a dynamic range of 50 dB with a light power density of 150 nW/mm/sup 2/ and a frame rate of 30 frame/s. The measured fixed pattern noise corresponds to 1.1% of the saturation level. The sensors dynamic range can be extended up to 96 dB using the double-sampling technique.

64 Pixels Contrast-Based Asynchronous Binary Vision Sensor for Sensor Networks Applications

This paper presents the design and electro-optical test of a 160 × 120-pixels CMOS sensor specifically conceived for Time-Of-Flight 3D imaging. The in-pixel processing allows the implementation of Indirect Time-Of-Flight technique for distance measurement with reset noise removal through Correlated Double Sampling and embedded fixed-pattern noise reduction, whereas a fast readout operation allows the pixels values to be streamed out at a maximum rate of 10 MSample/s. The imager can operate as a fast 2D camera up to 458 fps, as a 3D camera up to 80 fps, or even coupling both operation modes. The chip has been fabricated using a standard 0.18 μm 1P4M 1.8 V CMOS technology with MIM capacitors. The resulting pixel has a pitch of 29.1 μm with a fill-factor of 34% and includes 66 transistors. Distance measurements up to 4.5 m have been performed with pulsed laser light, achieving a best precision of 10 cm at 1 m in real-time at 55 fps and 175 mA current consumption.

A Range Image Sensor Based on 10-

This paper presents a 32 × 32 pixel image sensor for time-gated fluorescence lifetime detection based on single-photon avalanche diodes. The sensor, fabricated in a high-voltage 0.35- μm CMOS technology, uses an analog counting approach to minimize the area occupation of pixel electronics while maintaining a nanosecond timing resolution and shot-noise-limited operation. The all nMOS pixel is formed by 12 transistors and features 25- μm pitch and 20.8% fill factor. The chip includes a phase-locked loop circuit for gating window generation, working at a maximum repetition frequency of 40 MHz, while the sensor can be gated at frequency up to 80 MHz using an external delay generator. Optical characterization with a picosecond-pulsed laser showed a minimum gating window width of 1.1 ns. Example images acquired in both continuous and time-gated mode are presented, together with a lifetime image obtained with the sensor mounted on a fluorescence microscope.

\mu{\hbox {m}}

A 128 times 64 pixel programmable vision sensor performs real-time analog image processing over high dynamic range images is reported. The pixel-parallel single instruction multiple data (SIMD) architecture executes real-time spatio-temporal filtering with 2.8 GOPS/mm2 and large flexibility in coefficient assignment. The sensor uses time-based and pulse-based operating modalities to execute spatio-temporal filtering on images with dynamic range up to about 100 dB. The in-pixel processing is based on two operations: the absolute value of voltage difference and accumulation of partial results. Feature extraction from the entire image is also possible without the need for image dispatching, thus optimizing both processing speed and video bandwidth. The 32.6 mum square pixel, with a fill-factor of 24%, consists of two analog memories and 28 transistors. The sensor, fabricated in 0.35 mum CMOS technology, gives a fixed pattern noise (FPN) of 0.8% and power consumption of 14 mW at 3.3 V.

Lock-In Pixels in 0.18-

A CMOS interface for a piston-type MEMS capacitive microphone is presented. It performs a capacitance-to-voltage conversion by bootstrapping the sensor through a voltage pre-amplifier, feeding a third-order sigma-delta modulator. The bootstrapping performs active parasitic compensation, improving the readout sensitivity by ~12 dB. The total current consumption is 460 uA at 1.8 V-supply. The digital output achieves 80 dBA-DR, with 63 dBA peak-SNR, using 0.35 um 2P/4M CMOS technology. The paper includes electrical and acoustic measurement results for the interface.

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Positron-Emission Tomography (PET) is a nuclear imaging technique that provides functional 3-dimensional images of the body, finding its key applications in clinical oncology and brain-function analyses. The typical PET scanner is composed of a ring of scintillator crystals that absorb gamma rays and emit photons as a result, coupled to photon-sensing devices. The photons hit the sensors with a certain spread in space and time, depending on the material and geometry of the crystals. The sensors must then estimate the energy, the time of arrival (ToA), and the axial position of incoming gamma rays. Most commercially available scanners use photomultiplier tubes (PMTs), which are sensitive to magnetic fields, as the sensing element, making the integration of these systems with Magnetic-Resonance Imaging (MRI) impossible. A significant amount of research has focused on replacing PMTs with solid-state detectors, such as Silicon photomultipliers (SiPMs) [1], which can be integrated with MRI while maintaining the high-sensitivity of PMTs.

m CMOS Imaging Technology

A 641times128-pixel vision sensor, whose pixels estimate and perform a 1b quantization on the local contrast with a low energy budget is presented in this paper. The pixel-embedded time-adaptive visual processing is based on a charge-transfer mechanism, featuring no DC power consumption. The asynchronous readout process takes 147 mus and dispatches the column address of each asserted pixel, significantly reducing the chip activity at the interface. For typical indoor visual contrast estimation, involving 5% of the total number of pixels, the sensor exhibits a power consumption of 100 muW at 3.3V and 50 frames/s.