Nikolay N. Tchamov

Phase noise modelling and mitigation techniques in ofdm communications systems

This paper addresses the analysis and mitigation of the signal distortion caused by oscillator phase noise (PN) in OFDM communications systems. Two new PN mitigation techniques are proposed, especially targeted for reducing the intercarrier interference (ICI) effects due to PN. The first proposed method is a fairly simple one, stemming from the idea of linearly interpolating between two consecutive common phase error (CPE) estimates to obtain a linearized estimate of the time-varying phase characteristics. The second technique, in turn, is an extension to the existing state-of-the-art ICI estimation methods. Here the idea is to use an additional interpolation stage to improve the phase estimation performance around the boundaries of two consecutive OFDM symbols. The paper also verifies the performance improvement of these new PN estimation techniques by comparing them to the existing state-of-the-art techniques using extensive computer simulations. To emphasize practicality, the simulations are carried out in 3GPP-LTE downlink -like system context, covering both additive white Gaussian noise (AWGN) and extended ITU-R Vehicular A multipath channel types.

Characterization of OFDM Radio Link Under PLL-Based Oscillator Phase Noise and Multipath Fading Channel

We propose a discrete-time model for phase noise processes occurring in phase locked loop (PLL) based oscillators. By using linear time-invariant analysis in the phase domain, we arrive at a parallel auto-regressive moving-average phase noise model that captures the major noise sources and corresponding loop transfer functions of the PLL circuitry. The acquired model allows us to derive analytically the distribution of the inter-carrier interference (ICI) power in the receiver, shown to be a sum of correlated gamma random variables with a model-specific covariance matrix. Finally, we utilize the derived ICI distribution and proceed to analyze the effects of phase noise and multipath fading on the performance of OFDM radio links. For example, we evaluate the rate loss without ICI compensation or knowledge at the receiver, and illustrate the trade-off introduced by phase noise between the OFDM symbol length and the overhead caused by the cyclic prefix. Throughout the paper, simulations confirm the accuracy of the analytical expressions.

Enhanced Algorithm for Digital Mitigation of ICI Due to Phase Noise in OFDM Receivers

In this letter, an enhanced yet computationally efficient algorithm is proposed for suppressing ICI due to phase noise in OFDM receivers. The method is particularly targeted to improve the detection error rate performance when high-order constellation size and long cyclic prefix are used. The approach optimizes the interpolation of estimated excess phase between adjacent OFDM symbols and re-compensates for residual CPE after interpolation. The proposed enhancement is verified in OFDM system with 64-QAM subcarrier modulation and 1/4 cyclic prefix, and shown to outperform state-of-the-art. Implementation complexity and its optimization are also discussed.

VCO phase noise trade-offs in PLL design for DVB-T/H receivers

A linear time-invariant phase-domain phase-locked loop (PLL) model including the effects of thermal and flicker (1/f) noise sources is devised. Phase noise from the frequency dividers, loop oscillators, and oscillator buffering is modeled. Flicker noise is shown to be of major significance for the accurate characterization of DVB-T/H terminals integrated in contemporary CMOS processes. For obtaining an optimal voltage-controlled oscillator (VCO) in a PLL loop for DVB-T/H receivers, a phase noise trade-off for the VCO thermal and flicker noise contributions is derived. Link-level performance evaluation is carried out to validate the stipulated trade-off.

On OFDM link performance under receiver phase noise with arbitrary spectral shape

This article addresses the signal distortion caused by receiver phase noise (PN) on OFDM waveforms in direct-conversion radio receivers. A closed-form solution for the observed signal-to-interference-plus-noise ratio (SINR) is derived, describing the level of intercarrier interference (ICI) stemming from PN. Compared to existing literature, the analysis is valid for arbitrary oscillator spectral shape, the only assumption being that reasonably small phase noise values are observed. The analysis results can be used to derive practical circuit-level oscillator design criteria in terms of the allowable PN spectral density. The applicability and validity of the derived analysis are verified with extensive computer simulations.

Technique for Flicker Noise Up-Conversion Suppression in Differential LC Oscillators

A novel technique for the suppression of the flicker noise up-conversion in a differential LC oscillator topology is proposed. Relaxation mechanism and tunable noise filtering of the relaxation thresholds provide simultaneous suppression of differential pair and bias transistor flicker noise contributions. The proposed technique is validated on a fully monolithic oscillator architecture and 0.35-mum standard CMOS process by Cadence SpectreRF for the frequency range of 2.9-5.9 GHz. The phase noise improvement at 10 kHz offset versus a single-differential-pair LC oscillator is 6-15 dB across the tuning range.

New low-power/high-speed double-cross-coupled ICO/VCO

A new ICO/VCO circuit is proposed, having the ability to work from a lower voltage supply at higher speed than the existing ones. On 0.8 /spl mu/m BiCMOS (14 GHz NPN) an amplitude of 0.4 V at 1 GHz and consumption of only 5.6 mW from 2.2 V power supply is achieved. The control ability is 750 MHz/mA. The circuit has very low phase noise and it is suitable for modern PLLs.

New high-speed double cross-coupled ICO/VCO

A new circuit of ICO/VCO is proposed, having abilities to work from lower voltage supply at higher speed than the existing ones. On 0.8 /spl mu/m BiCMOS (14 GHz NPN) an amplitude of 400 mV at up to 2 GHz and consumption less than 16 mW from 4.5 V power supply is achieved. The control ability is 1250 MHz/mA. The circuit has very low phase noise and it is suitable for modern PLL circuits in communication and microprocessor applications.

New low-power GHz-range resonance-ring ICO/VCO

The proposed new monolithic ring-oscillator-core is faster and requires less voltage and power supply for developing twice the amplitude at higher frequencies. Also it has a simpler control than the existing ones. Based on a 0.8 /spl mu/m BiCMOS technology (17 GHz NPN) and also widely using low-Q inductors on silicon, the proposed resonance ring ICO/VCO develops 3/spl times/9 GHz with 800 mV amplitude, from only 1.2 volt and 5.4 mW, with a control ability of 100 MHz/mA. It is suitable for very-high-speed communication and computer applications.

New low-power ICO/VCO with double cross-coupled high-speed architecture

New circuits of high-speed multivibrators have been developed and subsequently used to create a new ICO/VCO circuit. While implemented on 0.8 /spl mu/m BiCMOS (14 GHz NPN) an amplitude on the symmetrical output of 550 mV at 2 GHz, with consumption less than 3.3 mW from 1.5 V power supply can be easily achieved. The control ability of the ICO is about 2.6 MHz//spl mu/A. The low phase-noise makes the circuit also suitable for building high-speed PLLs for various applications in communications and microprocessors.