Nitish Patel

A Bit-Stream-Based PWM Technique for Sine-Wave Generation

A new method for the generation of high-quality sinusoidal signals is presented. Multibit binary signals are represented using uniformly weighted single bit streams that can then be processed by digital logic. Building blocks that are useful for the construction of the sinusoidal generator are also presented. The bit-stream representation has the advantage of having the characteristics of a classical pulsewidth-modulation signal and hence can be used to drive high-power switching devices with minimal conditioning. The technique is simple and can easily be implemented using digital logic on a field-programmable gate array (FPGA). The operation of a single-phase inverter using the proposed technique is demonstrated using an Altera Stratix FPGA and a custom-built power stage. The complete digital design uses less than 200 logic elements. The performance of this technique is quantified using simulations and practical measurements. Practical implementations lead to total harmonic distortion measures ranging between 0.75% and 4.92%.

Neural Network Implementation Using Bit Streams

A new method for the parallel hardware implementation of artificial neural networks (ANNs) using digital techniques is presented. Signals are represented using uniformly weighted single-bit streams. Techniques for generating bit streams from analog or multibit inputs are also presented. This single-bit representation offers significant advantages over multibit representations since they mitigate the fan-in and fan-out issues which are typical to distributed systems. To process these bit streams using ANNs concepts, functional elements which perform summing, scaling, and squashing have been implemented. These elements are modular and have been designed such that they can be easily interconnected. Two new architectures which act as monotonically increasing differentiable nonlinear squashing functions have also been presented. Using these functional elements, a multilayer perceptron (MLP) can be easily constructed. Two examples successfully demonstrate the use of bit streams in the implementation of ANNs. Since every functional element is individually instantiated, the implementation is genuinely parallel. The results clearly show that this bit-stream technique is viable for the hardware implementation of a variety of distributed systems and for ANNs in particular.

The Effect of Terrain Inclination on Performance and the Stability Region of Two-Wheeled Mobile Robots

Two-wheeled mobile robots (TWMRs) have a capability of avoiding the tip-over problem on inclined terrain by adjusting the centre of mass position of the robot body. The effects of terrain inclination on the robot performance are studied to exploit this capability. Prior to the real-time implementation of position control, an estimation of the stability region of the TWMR is essential for safe operation. A numerical method to estimate the stability region is applied and the effects of inclined surfaces on the performance and stability region of the robot are investigated. The dynamics of a TWMR is modelled on a general uneven terrain and reduced for cases of inclined and horizontal flat terrain. A full state feedback (FSFB) controller is designed based on optimal gains with speed tracking on a horizontal flat terrain. The performance and stability regions are simulated for the robot on a horizontal flat and inclined terrain with the same controller. The results endorse a variation in equilibrium points and a reduction in stability region for robot motion on inclined terrain.

A bit-stream based scalar control of an induction motor

A field programmable gate array (FPGA) implementation of constant V/f scalar controller is presented. The implementation technique uses uniformly weighted single-bit streams. Various building blocks which are required for the implementation have been detailed. Preliminary experimental results on a three phase induction motor (IM) show that the technique is a viable alternative to standard techniques. The implementation uses approximately 600 logic elements (LE) on an Altera Stratix FPGA. Also this method is inherently parallel in nature and hence timing difficulties, as a result of an increase in complexity, are minimized.

Online Implementation of Servo Controllers Using Bit-Streams

The present study proposes an alternate strategy for implementing controllers based on bit-streams. The key to the success of bit-stream controllers is their ability to represent continuous time signals using uniformly weighted binary streams. These can easily be manipulated using standard logic gates available on a FPGA and therefore offers significant advantages in real time implementation. The performance of the bit-stream controllers have been demonstrated considering an example of a D.C. servo mechanism. Results of the experiment shows that bit-stream implementation can offer a viable alternative for constructing controllers for systems with several dimensions.

Performance enhancement of a statically unstable Two Wheeled Mobile Robot traversing on an uneven surface

A Two Wheeled Mobile Robot (TWMR) is a highly nonlinear and open-loop unstable system. Dynamic analysis and control design to keep the body of the robot balanced has been an area of research in the last decade. This problem has been dealt by many researchers for the robot motion on flat surfaces. A few studies have addressed the motion control on constant sloped path. This work studies the control of TWMRs on an uneven surface. With respect to previous results in the literature, the main contributions of this study are the dynamical modeling and control design of a two-wheeled mobile robot while traversing on uneven surface, in particular a single bump. A criterion has been proposed for the system performance evaluation. The system response to a baseline control and proposed Gain Scheduling control is quantified in simulation through proposed criteria. The results show an improvement in system performance on an uneven surface.

Parallel tuned contactless power pickup using saturable core reactor

This paper proposes a novel contactless secondary power pickup designed for inductively coupled contactless power transfer systems. It is based upon parallel LC tuning with the equivalent capacitance varied by a saturable core reactor (SCR). The proposed technique allows the power pickup to achieve full-range operation for power flow regulation and maintain constant output voltage at a high quality factor Q. The method eliminates the tedious fine-tuning process associated with traditional fixed power pickup tuning methods and eases the component selection. Moreover, it can overcome the online circuit parameter variations and automatically achieve the maximum power transfer capacity when required. In order to meet dynamic load demands, the SCR is controlled to be a variable inductor. A simple algorithm is developed to change the tuning condition of the power pickup. The effectiveness of the proposed power pickup and its applicability to general wireless power transfer applications has been demonstrated by both simulation and experimental results.

Techniques for conditioning high-speed bit-stream signals for power electronic applications

The Bit-Stream technique, which uses one bit wide and low to high frequency digital signals to represent control values, is a new approach for designing controllers. A Bit-Stream signal can directly be used to control power electronics systems but its inherently high switching speeds may lead to excessive switching losses, which are a major concern for many potential power electronic applications. This paper therefore proposes three different conditioning techniques or modulators, which convert high speed Bit-Stream signals into relatively low speed Bit-Stream signals that are suitable for Bit-Stream control of power electronics systems. The performance of the proposed modulation techniques, namely standard fixed-frequency PWM, Standard Down-sampled Bit-Streams (SDBS) and Hysteretically Down-sampled Bit-Streams (HDBS), is investigated in detail, using low speed Bit-Stream signals generated by the modulators as gate drive signals for a single phase DC to AC inverter. Simulation results show that the HDBS approach offers spread spectrum operation, lower switching losses than PWM, and uses the fewest hardware resources. Experimental results confirm that the HDBS modulator operates as expected, and produces an output current with a lower THD than a conventional PWM design.

A bit-stream based PWM technique for variable frequency sinewave generation

This paper presents a unique technique suitable for the generation of variable frequency sinusoidal waveforms with high quality. Arithmetic operations on the bit streams are performed through digital blocks. The proposed technique is simple and can be implemented on an field programmable gate array (FPGA). Results of a prototype single-phase inverter module with custom built power stage, are presented with simulations. Experimental results indicate that the technique can generate sinusoidal waveforms of frequencies from 20 Hz-60 Hz with total harmonic distortion (THD) 1.4-4%, respectively, and therefore the technique would be an ideal candidate for variable speed motor applications.

Stability and Performance Analysis of Bit-Stream-Based Feedback Control Systems

Bit stream (BS)-based feedback control systems often use a delta-sigma modulator (ΔΣ-M) as a two-level dynamic quantizer to encode and decode feedback signals. The stability and performance of such systems are critically dependent on the selection of the quantizer step size. This paper derives the stability condition of a BS-based control system in terms of the quantizer step size using sliding mode analysis. It is proved that the quantized system is equivalent to the original system on the sliding manifold under ideal sliding. However, the presence of the quantizer in a ΔΣ-M introduces noise into the system that often degrades the performance of the overall system. This paper therefore determines the optimum quantizer gain, i.e., the upper and lower boundaries of the quantizer, which maintains the stability and reduces the quantization noise. BS-based proportional- integral-differential (BS-PID) controllers are designed using the proposed optimal dynamic quantizer and implemented using three different realizations. Simulation results show that the optimal quantizer significantly reduces the noise within the system bandwidth. The effectiveness of the BS-PID controller with the optimal quantizer is further demonstrated using the experimental prototype of a dc servomechanism by designing a BS-PID controller. The experimental results from a laboratory prototype illustrate that the BS-PID controller gives identical performance to a traditional PID controller and effectively controls the system while consuming less information rate (channel interfaces) and hardware resources.