Noboru Azusawa
Hitachi
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Featured researches published by Noboru Azusawa.
IEEE Transactions on Industry Applications | 1980
Tsutomu Ohmae; Toshihiko Matsuda; Toshitaka Suzuki; Noboru Azusawa; Kenzo Kamiyama; Tsutomu Konishi
A new control method is described in which a microprocessor is used to regulate the speed of a dc motor driven by antiparallel-connected three-phase dual thyristor converters. A distinct feature of this speed regulating system is that speed response is improved by using a fast-response current controller for the internal loop. A fast-response current controller is obtained by employing a nonlinear compensation subloop and a proportional plus integral compensation subloop. The nonlinear compensation subloop is used to linearize the nonlinear load characteristics of the thyristor converter, which are encountered under discontinuous conduction states of current. The proportional plus integral compensation subloop reduces the deviation of detected current from the current reference. With these two current-control subloops a fast motor speed response is achieved under discontinuous as well as continuous conduction states; hence the steady-state accuracy of speed is improved. A speed regulator using a microprocessor was trial manufactured and tested with a 20-kW dc motor. It was found that an extremely fast controlled current response can be obtained even with a relatively long sampling period. Further, normal action was confirmed in four-quadrant operation.
ieee industry applications society annual meeting | 1997
Hideki Miyazaki; Hideshi Fukumoto; Shigeru Sugiyama; Makoto Tachikawa; Noboru Azusawa
This paper describes the design and construction of a neutral point clamped (NPC) inverter and power converter, with outputs of 0.8, 1.6, and 3.2 MVA, which use IGBTs. The inverter and converter are suitable for industrial drive applications, such as rolling mills, water pumps, etc., and they are composed of multi-inverter units in parallel. Each inverter unit is composed of four pairs of parallel IGBTs connected in series. In order to achieve current balance among the parallel connected IGBTs, low inductance laminated bus bars are designed by using an electro-magnetic simulator, and switching waveforms of IGBTs are evaluated by the circuit simulator SPICE using power device models. A variable capacitance snubber circuit is also presented for the NPC inverter to reduce both switching voltage swing and power consumption.
Archive | 1981
Noboru Azusawa
Archive | 1984
Noboru Azusawa; Hisayoshi Shiraishi
Archive | 1994
Kenji Kubo; Rached Dhaouadi; Masahiro Tobise; Noboru Azusawa
Archive | 1989
Noboru Azusawa; Tadahiko Hashimoto; Hisayoshi Shiraishi; Yoshiharu Nagae
Archive | 1989
Tadashi Okamoto; Noboru Azusawa
Archive | 1991
Akihiro Ohhashi; Tadashi Okamoto; Makoto Tachikawa; Takeshi Katoh; Noboru Azusawa; Junichi Hamano; Hitoshi Saitoh
Archive | 1981
Noboru Azusawa
Archive | 1984
Noboru Azusawa; Hisayoshi Shiraishi