Nobumitsu Hirose

Cat-CVD SiN-passivated AlGaN-GaN HFETs with thin and high Al composition barrier Layers

The effect of SiN surface passivation by catalytic chemical vapor deposition (Cat-CVD) on Al/sub 0.4/Ga/sub 0.6/N-GaN heterostructure field-effect transistors (HFETs) was investigated. The channel sheet resistance was reduced by the passivation due to an increase in electron density, and the device characteristics of the thin-barrier HFETs were significantly improved by the reduction of source and drain resistances. The AlGaN(8 nm)-AlN(1.3 nm)-GaN HFET device with a source/drain distance of 3 /spl mu/m and a gate length of 1 /spl mu/m had a maximum drain current density of 0.83 A/mm at a gate bias of +1.5 V and an extrinsic maximum transconductance of 403 mS/mm. These results indicate the substantial potential of Cat-CVD SiN-passivated AlGaN-GaN HFETs with thin and high Al composition barrier layers.

A comparative study of effects of SiNx deposition method on AlGaN/GaN heterostructure field-effect transistors

The effects of thin SiNx deposition on AlGaN/GaN heterostructure field-effect transistors were systematically studied by comparing their electrical and device characteristics. Two aspects of the thin SiNx film deposition were investigated: (i) the increase in two-dimensional electron gas (2DEG) density at the heterointerface and (ii) its capability as a gate insulating layer. Three different SiNx deposition methods were studied: catalytic chemical vapor deposition (Cat-CVD), metalorganic chemical vapor deposition (MOCVD), and plasma enhanced chemical vapor deposition (PECVD). A large increase in 2DEG density was obtained after SiNx deposition for all methods. The devices with MOCVD SiNx gate insulator showed a larger gate leakage current than those with the Cat-CVD and PECVD SiNx, implying that a thinning of the AlGaN surface barrier occurred due to Si diffusion into the AlGaN barrier during the high-temperature MOCVD process.

Strain-Relaxed Si1-xGex and Strained Si Grown by Sputter Epitaxy

Strained Si on our previously proposed strain-relief relaxed thin quadruple-Si1-xGex-layer buffer was formed by sputter epitaxy, the buffer relaxation mechanism and controllability of which were basically the same as those of gas-source molecular beam epitaxy (GS-MBE); the strained-Si crystallinity obtained by sputter epitaxy was largely comparable to that obtained by GS-MBE. By using sputter epitaxy, a flatter strained Si surface that exhibits almost no cross-hatch undulation morphology is obtained. The strain rate of the topmost 60-nm-thick strained Si layer grown on the quadruple-Si1-xGex-layer buffer with a total thickness of 240 nm and a top Ge content of 0.35 was 0.84% in the lateral direction. The results suggest that our environmentally light-load sputter epitaxy method can be applied to the fabrication of high-density Si/Si1-xGex strained devices.

Strain Distribution Analysis of Sputter-Formed Strained Si by Tip-Enhanced Raman Spectroscopy

Simultaneous nanometer-scale measurements of the strain and surface undulation distributions of strained Si (s-Si) layers on strain-relief quadruple-Si1-xGex-layer buffers, using a combined atomic force microscopy (AFM) and tip-enhanced Raman spectroscopy (TERS) system, clarify that an s-Si sample formed by our previously proposed sputter epitaxy method has a smoother and more uniformly strained surface than an s-Si sample formed by gas-source molecular beam epitaxy. The TERS analyses suggest that the compositional fluctuation of the underlying Si1-xGex buffer layer is largely related to the weak s-Si strain fluctuation of the sputtered sample.

Two-Dimensional Numerical Analysis of Amorphous-Silicon Field-Effect Transistors

A two-dimensional transistor model for short-channel amorphous-silicon (a-Si) field-effect transistors has been developed, taking the localized states in a-Si into account, and the basic characteristics of the transistors have been clarified by numerical computation. The mechanisms determining the short-channel transistor performance have been discussed. It is predicted that a 1 µm transistor with satisfactory performance can be fabricated by thinning the active a-Si region to 20 nm.

High performance AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors fabricated using SiN/SiO2/SiN triple-layer insulators

We proposed and fabricated AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) using SiN/SiO2/SiN triple-layer insulators. The role of each insulator is as follows: The topmost SiN film mechanically supports the T-shaped gate, the middle SiO2 film, which is damaged during the dry etching of the topmost SiN film, can be wet-chemically etched, and the bottom SiN film stabilizes the AlGaN surface. Therefore, the proposed MIS-HEMTs are mechanically stable in the sub-50-nm-gate region and free from damage caused by dry etching. We obtained a cutoff frequency fT of 139 GHz for a 45-nm-gate MIS-HEMT. This fT is the highest value for AlGaN/GaN HEMTs grown by metal organic chemical vapor deposition. We also estimated the average electron velocity under the gate to be 2.4×107 cm/s for a 120-nm-gate MIS-HEMT by transit time analysis.

Effects of boron dopants of Si (001) substrates on formation of Ge layers by sputter epitaxy method

The formation of Ge layers on boron-doped Si (001) substrates by our sputter epitaxy method has been investigated. The surface morphology of Ge layers grown on Si substrates depends on the substrate resistance, and flat Ge layers are obtained on Si substrates with 0.015 Ω cm resistivity. Highly boron-doped Si substrates cause a transition in the dislocation structure from complex dislocations with 60° dislocation glide planes to 90° pure-edge dislocations, resulting in the formation of flat Ge layers. Furthermore, we have found that the surface morphology of the Ge layers improves with increasing Ge layer thickness. Ge atoms migrating on the deposited Ge layers tend to position themselves at the reactive sites, where the reactivity is related to the number of bonding contacts between the Ge atom and the surface. This modifies the surface morphology, resulting in a flatter surface. Boron dopants together with the sputter epitaxy method effectively suppress the growth of Ge islands and result in the formation of flat Ge layers.

Investigation of Sn surface segregation during GeSn epitaxial growth by Auger electron spectroscopy and energy dispersive x-ray spectroscopy

The mechanism of Sn surface segregation during the epitaxial growth of GeSn on Si (001) substrates was investigated by Auger electron spectroscopy and energy dispersive X-ray spectroscopy. Sn surface segregation depends on the growth temperature and Sn content of GeSn layers. During Sn surface segregation, Sn-rich nanoparticles form and move on the surface during the deposition, which results in a rough surface owing to facet formation. The Sn-rich nanoparticles moving on the surface during the deposition absorb Sn from the periphery and yield a lower Sn content, not on the surface but within the layer, because the Sn surface segregation and the GeSn deposition occur simultaneously. Sn surface segregation can occur at a lower temperature during the deposition compared with that during postannealing. This suggests that the Sn surface segregation during the deposition is strongly promoted by the migration of deposited Ge and Sn adatoms on the surface originating from the thermal effect of substrate temperature, which also suggests that limiting the migration of deposited Ge and Sn adatoms can reduce the Sn surface segregation and improve the crystallinity of GeSn layers.

High Off-state Breakdown Voltage 60-nm-Long-Gate AlGaN/GaN Heterostructure Field-Effect Transistors with AlGaN Back-Barrier

We fabricated 60-nm-long-gate AlGaN/GaN heterostructure field-effect transistors (HFETs) with an AlGaN back-barrier structure and investigated the high frequency device characteristics and three-terminal off-state breakdown characteristics as a function of the source-to-drain distance. These devices, with source-to-drain distances of 2 to 5 µm, showed very high current-gain cutoff frequencies of more than 118 GHz. The off-state breakdown characteristics were largely dependent on the source-to-drain distance compared to the high frequency device characteristics, and the devices with source-to-drain distances of 4 and 5 µm exhibited very high off-state breakdown voltages of more than 110 V while keeping very high cutoff frequencies. These good breakdown characteristics might be the result of the double-barrier structure (i.e., AlGaN/GaN/AlGaN), which prevents electron spillover to the AlGaN back-barrier at high power conditions.

Ultrathin AlN∕GaN heterostructure field-effect transistors with deposition of Si atoms on AlN barrier surface

We deposited Si atoms on the AlN barrier surface of an ultrathin AlN∕GaN heterostructure field-effect transistor (HFET). This induced a remarkable change in the electrical properties of the two-dimensional electron gas. A 2-nm-thick Si layer reduced the sheet resistance of an AlN∕GaN HFET (AlN barrier, 2nm) from 60356to388Ω∕sq. The effect on the Ohmic contact was also significant: the presence of an undermost layer of Si atoms under Ohmic contacts produced a low specific contact resistance of 1.7×10–6Ωcm2. A 50-nm-gate AlN∕GaN HFET with a Si layer exhibited excellent device characteristics with a current-gain cutoff frequency of 106GHz.