Noriaki Kondoh

Adaptive equalizer for digital cellular radio

The authors study the performance of the decision feedback equalizer (DFE) for application to the US digital cellular telephone system. The performance of the DFE is very sensitive to the delay interval between two rays and considerably degrades around a delay of 0.2T, where T is symbol duration. To improve the performance, the authors propose to utilize the Coded Digital Verification Color Code (CDVCC) part at the middle of the TDMA (time division multiple access) frame as a training sequence of the DFE. A bit error rate below 3% at all delays up to 1T can be achieved when the average E/sub b//N/sub 0/ is 22 dB and the fading frequency is 80 Hz.<<ETX>>

Digital cellular system with linear modulation

The authors describe a digital cellular system with linear modulation. They discuss two kinds of modulation schemes-QPSK (quadrative phase-shift keying) and pi /4 shift QPSK, and two kinds of detection schemes-coherent detection and limiter-discriminator detection. The features of these modulation/detection schemes are clarified. From the collective point of view, the pi /4 shift QPSK/limiter-discriminator detection is judged to be the most advantageous. Next, the authors show examples of the radio link design for a digital cellular system with linear modulation. The system could be constructed at a transmission power of 100-200 mW. Finally, the breadboard equipment configuration and the experimental results are shown.<<ETX>>

A MLSE receiver for the GSM digital cellular system

Proposes a new type of MLSE receiver for the GSM system. The MLSE receiver consists of a new type of MLSE equalizer with soft-decision outputs, a channel decoder with soft-decision inputs, and others. The MLSE equalizer directly computes a soft-decision value from the hard-decision symbol sequence, so that it does not require reliability memories. As a result of computer simulations, the authors have confirmed that the MLSE receiver satisfies GSM receiver specifications.<<ETX>>

A design consideration on TDMA cellular radio

A time-division multiple access (TDMA) cellular system using QPSK (quadrature phase shift keying) with coherent detection is studied. The required guard time between TDMA bursts and the effect of the unbalanced characteristics of an IF filter on a detected signal are analyzed. An attempt is made to minimize the guard time between TDMA burst signals using a window which suppresses the signal at both edges. As a result, it was found that the required guard time can be reduced to a 2.3 symbol duration in a 3-km radius cell. If a conventional IF filter (which is designed for an analog terminal) is adapted to a digital terminal, in cases of 1 kHz variation of the center frequency intersymbol interference caused by the IF filter would be about -20 dB. It is concluded that more sophisticated IF filters are needed for digital cellular terminals are needed than for analog cellular terminals.<<ETX>>

A decision feedback equalizer with a frequency offset compensating circuit for digital cellular radio

The performance of a decision feedback equalizer (DFE) with a frequency offset compensating circuit for the North American digital cellular system (NADC) is presented. The carrier frequency offset at the equalizers output deteriorates performance of the DFF. Using the unit upper triangular matrix diagonal matrix decomposition type recursive least squares algorithm as an adaptive algorithm, a frequency offset compensating circuit, which is composed of a phase locked loop (PLL), is used. Simultaneous control of the DFE and PLL is effectively utilized to improve the performance. A BER below 3% for all delays up to one symbol period can be achieved when the average E/sub b//N/sub 0/ is 20 dB, the fading frequency is 80 Hz and the carrier frequency offset is 200 Hz in the simulation results. The authors assume the two rays equal power multipath Rayleigh fading model, the same as the NADC specifications. The influence of quantization in the calculation is described. The mantissa-field occupies 8 bits and the exponent-field occupies 6 bits.<<ETX>>