Olof Bengtsson

Small-signal and power evaluation of novel BiCMOS-compatible short-channel LDMOS technology

We describe a very short-channel 0.15-/spl mu/m LDMOS transistor with a breakdown voltage of up to 60 V, manufactured in a standard 0.35-/spl mu/m BiCMOS process. At 1900 MHz and a 12-V supply voltage, the 0.4-mm-gatewidth device with shortest drain drift region gives 100-mW output power P/sub 1dB/ at a drain efficiency of 43%. It has a transducer power gain of over 20 dB. The maximum current gain cutoff frequency f/sub T/ is 15 GHz, and the maximum available gain cutoff frequency f/sub MAX/ is 38 GHz. We show the dependence of f/sub T/, an f/sub MAX/ of gate and drain bias for transistors with different drain drift region length. The LDMOS process module does not affect the performance or the models of other devices. We present for the first time a simple way to create high-voltage high-performance LDMOS transistors for an RF power amplifier use even in a very downscaled silicon technology.

Analysis, Design, and Evaluation of LDMOS FETs for RF Power Applications up to 6 GHz

The analysis, design, and evaluation of medium-voltage laterally diffused metal oxide semiconductor (LDMOS) transistors for wireless applications up to 6 GHz is presented. Using an optimized N-LDMOS transistor, power devices of different transistor geometries were fabricated in a standard 0.25-μm bipolar complementary metal oxide semiconductor (BiCMOS) technology with and without on-chip stabilization networks. The influences of the finger geometry and the stabilization networks on the RF performance were studied based on small-signal and large-signal on-wafer measurements. It was analytically shown and experimentally verified that transistor geometries with reduced gate width per finger but higher number of fingers are advantageous regarding the maximum oscillation frequency. From the source/load-pull characterization of a 1.8-mm total gate-width device, state-of-the-art, large-signal performance with a maximum output power of 29.7 dBm and a peak drain efficiency of 44% were obtained at 5.8 GHz. Power evaluation of the LDMOS transistors was also carried out in designed hybrid power amplifier modules targeted for vehicular wireless LAN applications. In the 5.8-5.9 GHz band, an output power of 1 W at 1-dB power compression, an adjacent channel power ratio of -38 dBc and an error vector magnitude of 3% at 1 dB peak power compression are reported.

Robust stacked GaN-based low-noise amplifier MMIC for receiver applications

A robust two-stage low-noise amplifier based on GaN technology is presented. The MMIC LNA is realized using stacked transistors in the first stage to obtain high ruggedness. The LNA survived a record value of 43 dBm of input power at 5 GHz measured in a coaxial test fixture without any visible degradation of the transistors. The results prove that the new stacked architecture allows the LNA to withstand twice the CW input power expected for the conventional topology.

Novel BiCMOS compatible, short channel LDMOS technology for medium voltage RF and power applications

We describe a very short channel, 0.15 /spl mu/m, LDMOS transistor, with a breakdown voltage of up to 45 V, manufactured in a standard 0.35 /spl mu/m BiCMOS process. At 1900 MHz and a 12 V supply voltage the 0.4 mm gate width device gives 100 mW output power P/sub 1/ /sub dB/ at a drain efficiency of 43%. It has a transducer power gain of more than 20 dB and a current gain cutoff frequency, f/sub T/, of 13 GHz. The maximum available gain cutoff frequency, f/sub MAX/, is 27 GHz. The LDMOS process module does not affect the performance or models of other devices. We present for the first time a simple way to create high voltage, high performance LDMOS transistors for RF power amplifier use even in a very downscaled silicon technology.

A Novel Model for Digital Predistortion of Discrete Level Supply-Modulated RF Power Amplifiers

The linearization of a discrete level supply modulated RF power amplifier using digital predistortion (DPD) is investigated. The characteristics of the system are evaluated and a novel DPD model, capable of handling the switching dynamics of the system, is developed and presented. The model is tested for an RF power amplifier operating at 2.65 GHz with a 16 MHz modulated signal. It is shown that modeling the supply voltage transitions with the novel model significantly improves linearity by up to 1.6 dB NMSE and 3.3 dB in ACLR. With the novel model DPD on the supply modulated PA can achieve similar linearity as a single supply PA but with much improved PAE.

Highly linear X-band GaN-based low-noise amplifier

This paper presents a highly linear X-Band low-noise amplifier. The LNA is realized in coplanar technology using the 0.25 μm GaN-HEMT MMIC process from FBH. A noise figure below 2.5 dB is measured from 7 GHz to 12 GHz together with very good input and output matching. This LNA provides a OIP3 of 28 dBm at 8 GHz, which is 8 dB above the 1 dB compression point.

Investigation of SOI-LDMOS for RF-Power Applications Using Computational Load Pull

Small-signal and computational load-pull simulations are used to investigate the effect of substrate resistivity on efficiency in high-power operation of high-frequency silicon-on-insulator-LDMOS transistors. Identical transistors are studied on substrates with different resistivities. Using computational load pull, their high-power performance is evaluated. The results are compared to previous investigations, relating the off-state output resistance to high-efficiency operation. From the large-signal simulation, an output circuit model based on a load-line match is extracted with parameters traceable from small-signal simulations. It is shown that, albeit high off-state output resistance is a good indication, it is not sufficient for high efficiency in a high-power operation. The bias and frequency dependence of the coupling through the substrate makes a more detailed on-state analysis necessary. It is shown that very low resistivity and high-resistivity SOI substrates both result in a high efficiency at the studied frequency and bias point. It is also shown that a normally doped medium-resistivity substrate results in a significantly lower efficiency.

A three-level class-G modulated 1.85 GHz RF power amplifier for LTE applications with over 50% PAE

A highly efficient three-level class-G modulated RF power amplifier (PA) is presented. The PA is designed to operate as downlink amplifier in the 1800-1900 MHz LTE-band. At 1.85 GHz the maximum output power under continuous wave excitation is 48.2 dBm (66 W). The system achieves an overall efficiency of more than 50% when amplifying a 20 MHz OFDM signal with 9 dB peak-to-average power ratio at 40 dBm (10 W) average output power and over 15 dB gain. In combination with digital predistortion the class-G modulated PA can achieve an ACLR of -36.2 dB and an EVM of 2.1%. The class-G modulation enables excellent efficiency due to absence of a linear amplifier in the modulator stage. The efficiency improvement due to the three-level class-G modulation reaches 18.7 percentage points.

Power amplifier behavioural model mismatch sensitivity and the impact on digital predistortion performance

This paper presents an investigation of power amplifier behavioural model performance sensitivity to in-band reflections. The measurement system and model extraction process is presented together with the results and an analysis of the effect of parameter variations in a digitally predistorted system. A load-pull system is used together with a digital baseband model extraction system to identify the impact on modelling performance. The results show that the model performance varies greatly with in-band reflection magnitude and phase on the amplifier output. It is also shown that a digital predistortion based on a model extracted at matched conditions, where it gives an excellent improvement of 20 dB in adjacent channel leakage ratio (ACLR), gives a poor improvement of 7 dB for miss-matched conditions with as low reflections as Γ=0.2 (return loss 14 dB). This indicates that in-band reflections need to be considered and adaptive predistortion used also for low VSWR system like base-stations for telecommunication.

Simulation of RF Power Distribution in a Packaged GaN Power Transistor Using an Electro-Thermal Large-Signal Description

A comprehensive electro-thermal model of a packaged GaN high electron-mobility transistor (GaN-HEMT) is presented. It includes an RF large-signal description, as well as thermal coupling between the individual cells of a powerbar. Thus, it allows studying the inhomogeneous RF power distribution and other effects within the transistor. The model is verified and applied to a 50-W GaN-HEMT powerbar. The model proves to represent a versatile tool for transistor design. Important features of the new version compared to existing versions are its capability to predict internal electrical instabilities and to allow for optimization of the cell combining.