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Om P. Agrawal

Lattice Semiconductor

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Publication

Featured researches published by Om P. Agrawal.

Archive | 2002

Variable grain architecture for FPGA integrated circuits

Om P. Agrawal; Herman M. Chang; Bradley A. Sharpe-Geisler; Giap H. Tran

Archive | 2002

FPGA with register-intensive architecture

Om P. Agrawal; Bradley A. Sharpe-Geisler

Archive | 2000

Scalable architecture for high density CPLD's having two-level hierarchy of routing resources

Om P. Agrawal; Claudia A. Stanley; Xiaojie He; Larry R. Metzger; Robert A. Simon; Kerry Ilgenstein

Archive | 2003

Hierarchical general interconnect architecture for high density FPGA'S

Om P. Agrawal; Bradley A. Sharpe-Geisler

Archive | 2002

Enhanced CPLD macrocell module having selectable bypass of steering-based resource allocation and methods of use

Om P. Agrawal; Fabiano Fontana; Gilles M. Bosco

Archive | 2001

HIGH SPEED INTERFACE FOR A PROGRAMMABLE INTERCONNECT CIRCUIT

Om P. Agrawal; Jinghui Zhu; Kuang Chi; Chienkuang Chen

Archive | 1995

Multi-tiered hierarchical high speed switch matrix structure for very high-density complex programmable logic devices

Om P. Agrawal; Bradley A. Sharpe-Geisler

Archive | 2003

Scalable serializer-deserializer architecture and programmable interface

Om P. Agrawal; Bai Nguyen; Kuang Chi; Brad Sharpe-Geisler; Giap H. Tran

Archive | 2003

Programmable logic device with flexible memory allocation and routing

Om P. Agrawal; Jason Cheng; Paul R. Bonwick; Bradley Felton; Andrew Armitage

Archive | 2006

Flexible memory architectures for programmable logic devices

Howard Tang; Fabiano Fontana; David L. Rutledge; Om P. Agrawal; Henry Law

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